I'm debugging an application running on a MKL17Z256VLH4 with KDS v3.2.0. It'd be helpful if there were a way to allow ISRs to continue to run while single-stepping through the main application thread. Is there a way to do that?
In general, the behavior depends on the debugger. Interrupts can be masked through the Debug Halting Control and Status register. Default debug behavior is usually to mask interrupts during instruction step, otherwise allow. This is what MCUXpresso does. The caveat is, MCUXpresso gets its' execution commands via GDB. Although it's probably sufficient to set a break on the next source line and 'resume', there's no guarantee GDB hasn't decided to instruction step to the next break. Such a decision might be associated more typically of a stepover command on a high-level source line, but you see the problem. Experiment first.
Thanks and regards,
If you stop at a break point and set a break point at the next line of code and let the chip run I would expect it to first take any pending interrupts before it hits the next line.
Set a break point in an interrupt that you know will pend and see whether it hits this or the next line first to be sure.
Hi Jim Fell
Once you have reached a break in your code, all the processors are stopped, and even if an interrupt is triggered, as long as your CPU is stopped, the ISR of this Interruption will not be attended by your CPU.
So, there is no possible way to step in your main application and attend your ISR at the same time.