How many clk will DMA take to complete ADC data transmission

[王剑翰]

For K10, if I use ADC to capture data and DMA to translate the data, how many clk will DMA take to complete ADC data transmission?

[EarlOrlando]

Hello,

The DMA performance is reported in the reference manual. I.e. for the K64F in its reference manual in the chapter 22.4.4 is documented how to calculate the time that the DMA needs to complete a transaction. In this case the transaction corresponds to a an internal peripheral to internal SRAM so it needs 9 clock cycles assuming zero wait-states. For a more detailed information please go to the reference manual.

Best regards,

Earl.

[EarlOrlando · Accepted solution]

Sorry I didn't notice that you specified that you are using the K10 MCU but I took a look into the K10 reference manual and the EDMA peripheral is exactly the same so the information that I provided is correct.

Best regards,

Earl.

[王剑翰]

Hi Earl，

Sorry for late, and thanks for your kindly reply!

I have checked it.