Hi
The Flash access via FMC(Flash Memory Controller), which has the 128 (64 for bank1, Data Flash)-bit prefetch speculation buffer with controls for instruction/data access per master and bank.
In default, the speculation buffer is enabled for instruction and data.
Customer could use MSCM_OCMDR1 register (related to data Flash) [OCMC1] bit5 & bit4 to invalidate the speculation buffer.
OCMDR1[4] or OCMDR1[5] bit controls whether prefetches (or speculative accesses) are initiated in
response to instruction fetches or data references, see section FMC speculative reads.
• OCMDR bit 4: Data Prefetch. Value 0 means enable and value 1 means disable.
• OCMDR bit 5: Flash Speculate. Value 0 means enable and value 1 means disable.
Wish it helps.
Have a great day,
Ma Hui
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