FRDM-KEAZ and SPI

[waltappel]

Sorry if this is not an appropriate forum for this question. If there is a better place to post it, please let me know.

I am using a FRDM-KEAZ128Q80 to create a sample SPI program that uses the SPI0 module in master mode to get data from a Bosch BMP280 pressure sensor slave. An example of the type of operation I need to do is read a series of registers in the pressure sensor. It should be pretty easy because on register reads, the pressure sensor receives a control byte (the register address), then it autoincrements and sends the register contents for the first register and any subsequent registers until the chip select signal goes high.

Unfortunately, the Kinetis SPI module tends to set the chip select to high between transmissions. How can I either force the chip select to stay low or use a GPIO as the chip select. I am sure I am missing something really obvious but when I setup an GPIO as a chip select, how do I trigger the SPI module to activate its output clock, serial data out, and serial data in pins?

Thanks in advance for any guidance!

Walt

[AndreVB]

Hello Walt, Xiangjun_rong

It's been a while since you started the post. I'm having simular issue with KL25+BMP280.
I´ve check the SPI0 regs and they are configured as

1)MSTR bit in SPI_C1 is set, the SPI is in master mode

2)MODFEN bit in SPI_C2 is set.

3)SSOE  in SPI_C1 bit is set, the SS pin will be Low during data transfer, high during interval between two transmission automatically.

But I still see the SS going high between two bytes. In order to that work, I need to configure SS as GPIO. 

But I still see some "space between the two bytes, where SS enabling signal would be.

Is there any particular change on SPI0 regs for KL25?

Thank you
Andre

[xiangjun_rong]

Hi, Martin,

Regarding your question, I have downloaded the data sheet of BMP280, I think the required SPI timing of BMP280 is CBS HIGH during the interval of transmission, while the CBS pin should be LOW during the data transmission.

When the SPI of KEA128 is set up in master mode, you can set the SPI registers so that it can implement the function: when the SPI transfer data, the SS pin will be LOW automatically, the SS pin will be High only during the interval of transmission automatically.

This is the setting:

1)MSTR bit in SPI_C1 is set, the SPI is in master mode

2)MODFEN bit in SPI_C2 is set.

3)SSOE  in SPI_C1 bit is set, the SS pin will be Low during data transfer, high during interval between two transmission automatically.

If you do want to use a GPIO to connect to CBS of BMP280, it is okay. The /SS of SPI can be configured as GPIO, of course, you can use any GPIO pin of KEA128 to connect to CBS pin. The SPI0_PCS(SPI0_SS) is multiplexed with PTE3, the other functions are KBI1_P3, SPI0_PCS.

How  to configure the SS pin of SPI in GPIO mode:

1)MSTR bit in SPI_C1 is set, the SPI is in master mode

2)MODFEN bit in SPI_C2 is set.

//configure SS pin in GPIO mode

3)set the PTE3 bit in GPIOB_DDR so that the PTE3 pin functions as GPIO output

4)set the PTE3 bit in GPIOB_PDOR will have the PTE3 pin in HIGH state.

5)clear the PTE3 bit in GPIOB_PDOR will have the PTE3 pin in LOW state.

This is the procedure:

clear the PTE3 pin, write register address to SPI data register, you can check the SPRF to determine if valid data has been received, read the data in SPI0_D to memory, write dummy data to SPI0_D to launch another transfer, check SPRF bit,..., set PTE3 when specified number of data have been transferred. You can also use interrupt mechanism to transfer.

BR

Xiangjun Rong

[waltappel]

Thankyou very much for your detailed response! I was having several problems and seeing some erratic behavior and kept looking for a software issue. I am embarrassed to admit that when I finally looked at the circuit I quickly realized that  I had neglected to use a logic shifter between the KEA SPI interface and the BMP280 SPI interface. VDD on the FRDM-KEAZ board that I am using is about 6.2 V and the BMP280 is a 3.3 V part. The BMP280 board I am using has a 3.3 V regulator but that only regulates the supply to the chip, not the logic levels applied to the SPI pins by the KEA. I will add a bidirectional logic level shifter and will report the results.

One thing I could not find is guidance on whether the use of a high drive pin is needed when generating the chip select signal using GPIO. Also, does using FGPIO give more consistent timing than using the GPIO interface?

Thankyou again for your help!

Walt

[xiangjun_rong]

Hi, Walter,

If you are using FRDM-KEA128, I think there is a jumper 10, which can select if you use 3.3V power supply or 5V power supply, if you use 3.3V power supply for KEA128, the logic shifter is not required, if you close pin2&1 of J10 on FRDM-KEA128, 3.3V logic is used.

You can connect the GND/SCK/SS/MOSI/MISO between two boards, it is okay.

The function of FGPIO and GPIO is the same, but they have different address, you can use either one of them, not both. The only difference is the accessing speed.

BR

XiangJun Rong

[martin_kovar]

Hi,

this is not the correct forum, I move this question to the Kinetis Microcontrollers.

Regards,

Martin