Errata for mask 1N96F clarification (I2C repeated start)

[jrychter]

Errata document for mask 1N96F states:

e6070: I2C: Repeat start cannot be generated if the I2Cx_F[MULT] field is set to a non- zero value

The following workaround is proposed:

2) Temporarily set I2Cx_F [MULT] to zero immediately before setting the Repeat START bit in the I2C C1 register (I2Cx_C1[RSTA]=1) and restore the I2Cx_F [MULT] field to the original value after the repeated start has occurred

What does "after the repeated start has occurred" mean? Does this mean I can restore I2Cx_F[MULT] field immediately after I write 1 to RSTA?

In other words, is the following code OK?

          f_register = I2C_F_REG(i2c_base_ptr);

          I2C_F_REG(i2c_base_ptr) = (f_register & 0x3f);

          I2C_C1_REG(i2c_base_ptr) |= I2C_C1_RSTA_MASK;

          I2C_F_REG(i2c_base_ptr) = f_register;

[perlam_i_au]

Hello Jan:

Well the repeat start is used for redirect your messages as master to a different slave without releasing the bus, then this means that you can use the lines you described to set desired value for MULT once you have generated the Repeated Start.

Please check on 38.4.1.5 Repeated START signal and Figure 38-38. I2C bus transmission signals on the reference manual KL25P80M48SF0RM which I used as example.

Have a nice day,
Perla Moncada

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[jrychter]

To clarify: I wasn't sure if the RSTA bit controlled the output latch directly, e.g. if writing to it caused the restart to be generated immediately, or after a write to the data register, just before a new address byte is transmitted.

From your answer, I understand that writing to RSTA immediately generates a restart condition, so my code is OK. Please correct me if this is not the case. Thanks!

[perlam_i_au · Accepted solution]

Yes, it seems your code is correct.

[jrychter]

Thank you, appreciate the help!