ETB access within the processor

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

ETB access within the processor

968 Views
leguan1
Contributor II

Hi,

I am writing a program to read the ETB memory from a task on a frdm-k64f board. I can achieve this by using the AHB interface to read the ETB data registers indirectly. However, it seems to be inefficient because I can only access 1 word once. Based on the ARM ETB manual (ARM Information Center ), the ETB trace RAM is also aliased directly into the system memory space. The base addresses of the ETB registers and the trace RAM are defined by the AHB decoder. While I can find the base address of the ETB registers easily, I cannot find the base address of the trace RAM. I searched both the ARM documents and the K64 Sub-Family Reference Manual.

Any clue is appreciated!

Thanks!

Tags (1)
0 Kudos
5 Replies

850 Views
diego_charles
NXP TechSupport
NXP TechSupport

Hello, Leguan 

I´m currently working to provide you an answer, as soon I get useful information I' let you know. 
Have a great day,
Diego

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

0 Kudos

850 Views
leguan1
Contributor II

Thanks in advance, Diego!

I need to clarify that it turns out the even through ETB registers, I cannot read the ETB RAM. Actually, I can only access a limited number of ETB registers. After checking the manual, BIT 2 of ETB control registers controls whether access via AHB is allowed. It is 0 which only allows JATG access.

Moreover, I found that the NXP ETB is not fully consistent with the ARM document. For example, the RAM width register is 0 while it should be 

b100000 or b011000. Can you point me to the appropriate document to get more details of NXP ETB implementation?

Thanks!

0 Kudos

850 Views
diego_charles
NXP TechSupport
NXP TechSupport

Hello Leguan, 

Sorry for my late response.

Currently, there are no software examples and low-level implementations that I could provide you that match your application.

 

Besides the reference manual, by this point, I´m not sure if you are aware of the   NXP´s MCUxpresso guide offers MCUXpresso IDE Instruction Trace Guide.

Chapter 3.3 Embedded Trace Buffer (ETB) provides more details in the ETB, including techniques to configure the buffer, but not for a specific MCU. 

 I have to mention that the read of the trace data from the ETB  is made trough a  LinkServer connection I  (including many other CMSIS-DAP probes,  OpenSDA circuits)  during a debug session in MCUXpresso, which

differs from reading the ETB during a task.

 

About the differences that you notice among the ARM documentation, you are right,  since the implementation of ETM and ETB is vendor-specific.  

Best regards, Diego. 

0 Kudos

850 Views
leguan1
Contributor II

Hi Diego,

Thanks for the response. I know the MCUXpresso IDE Instruction Trace Guide and it works perfectly with the hardware debugger.  It seems there is no way to read the buffer directly from inside the target.

Best!

0 Kudos

850 Views
diego_charles
NXP TechSupport
NXP TechSupport

Hello, Leguan

If I could help in something else, please let me know, 

Best regards, Diego. 

0 Kudos