I am trying to active the following LCD,
1. use 4 bits per pixel TFT mode
2. RAM buffer is set to 0x20000000 (SRAM_U start address)
3. Per K70 datasheet, the total RAM buffer for LCD is 4 bits * 272* 480 = 64KByte.
So I use all the SRAM_U(64K) as the RAM buffer.
My question are,
1. I didn't find any limitation of this configuration in document, but this configuration can work?
2. I set relative configuration in LCDC registers, but it seems not works.
I fill all the SRAM_U buffer to ZERO, but only 1/6(1/8) LCD pannel displays color...
The other 5/6 keeps the same condition.
Thanks for help!
If you are using 4bpp TFT, then you must use the mapping RAM. See section 62.6.1 for details. Basically you need to put a sixteen 18-bit entries into the Background Look Up Table (BGLUT) to select which of the sixteen of the possible 256K colors to use. But yes, it does work.
Here's some code specific for setting up the BGLUT that can get you started:
//Fill all 256 entries of the BackGround Look Up Table
//You would only need 16 for 4bpp mode
for(i=0; i < 256; i++)
LUT_BG = (unsigned int *)0x400b6800 + i; //address in BGLUT
*LUT_BG = 0x443322CC; //color value
printf("\nBackground Plane Lookup Table Filled\n");
SIM_MCR&=~SIM_MCR_LCDSTART_MASK; //Stop LCDC
// set LCD panel configuration
LCDC_LPCR_TFT_MASK | //TFT Screen
LCDC_LPCR_COLOR_MASK | //Color
LCDC_LPCR_BPIX(0x2) | //4 bpp
LCDC_LPCR_FLMPOL_MASK | //first line marker active low
LCDC_LPCR_LPPOL_MASK | //line pulse active low
LCDC_LPCR_SCLKIDLE_MASK | //Enalbe LSCLK when vsync is idle
LCDC_LPCR_SCLKSEL_MASK | //Always enable clock
LCDC_LPCR_PCD(0x3); //Divide 120 PLL clock by (3+1)=4 to get 30MHz clock
SIM_MCR|=SIM_MCR_LCDSTART_MASK; //Start LCDC