Does ADC require additonal time after intialization to sample accurately?

[vaibhavi_padwal]

Hi,

I am trying to implement 12-bit ADC using FRDM K22F board to sample a DC voltage. I have used auto-calibration function to calibrate ADC during initialization and the ADC gets calibrated successfully as indicated by CALF flag in SC3 register. I have observed that the total fluctuation in ADC Conversion results for 500 samples is more (6-7 counts). But when I add a long delay (intentional) after the auto calibration function is called, the fluctuation decreases to 4 counts. Does ADC take some more time before it is ready to sample the input signal accurately? If yes, then how can I ensure that ADC has completed auto calibration and is ready to sample the signal accurately?

The ripple in ADC input signal is very low.

The ADC initialization sequence is as follows:

adc16_config_t adc_config;

EnableIRQ(ADC0_IRQn);

ADC16_GetDefaultConfig(&adc_config);

adc_config.clockSource = kADC16_ClockSourceAlt0;/*Bus clock 60 Mhz*/

adc_config.clockDivider = kADC16_ClockDivider4;/*Divided by 4*/

adc_config.longSampleMode = kADC16_LongSampleDisabled;

ADC16_Init(ADC0, &adc_config);

while(kStatus_Success != ADC16_DoAutoCalibration((ADC0))

{

}

if(ADC16_GetStatusFlags((ADC0))

{

printf("failed");

}

/*

for (uint32_t p=0, p < 0xFFFFFFF, p++)

{

} /* intentional delay */

*/

ADC16_EnableHardwareTrigger((ADC0, false); /* Make sure the software trigger is used. */

ADC16_EnableDMA((ADC0, true);

Please help in resolving the issue.

Thanks and Best Regards,

Vaibhavi

[Alexis_A]

Hi Vaibhavi,

Usually the ADC has some measurements error and there's some techniques to help you improve the accuracy of this. Please check the following documents: 

Improving my ADC design 

Cookbook for SAR ADC Measurements

How to Increase the Analog-to-Digital Converter Accuracy in an Application

One of the easiest way would be to enable the long sample in the configuration structure and select one of the option for it.

kADC16_LongSampleCycle24 = 0U, /*!< 20 extra ADCK cycles, 24 ADCK cycles total. */
kADC16_LongSampleCycle16 = 1U, /*!< 12 extra ADCK cycles, 16 ADCK cycles total. */
kADC16_LongSampleCycle10 = 2U, /*!< 6 extra ADCK cycles, 10 ADCK cycles total. */
kADC16_LongSampleCycle6 = 3U, /*!< 2 extra ADCK cycles, 6 ADCK cycles total. */
kADC16_LongSampleDisabled = 4U, /*!< Disable the long sample feature. */

Let me know if this helps you.

Best Regards,

Alexis Andalon