It can use DMA channel link function, such as DMA CH0 as half low buffer and DMA CH1 as half top buffer.
DMA CH0 <=> DMA CH1.
When DMA CH0 finish the transfer link to DMA CH1 for transfer; and when DMA CH1 finish transfer, link to DMA CH0 start.
There need to use DMA continuous mode.
And in each DMA interrupt, the CPU can load new data to each DMA channel related data array.
Wish it helps.
best regards
Ma Hui
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