DMA MUX Configuration source selection in AN4590

[abdullahansari]

Hello Every one.

I am using the DMA to get the ADCs result to a buffer as stated in AN4590 application note.

In the note during DMAMUX channel request source selection I am confused how the source number is given. like for ADC0 they have given 0X28 and for other channel its 0X36. My question is where does these 0x28 and 0x36 comes from and in which section of configuration manual r they stated? i have seen ADC and DMA and DMAMUX chapters but I couldnt find that.

here are the lines from AN4590

Regards

Abdullah

[mjbcswitzerland]

Hi

See the "Chip Configuration" section chapter of the user's manual. Then the "DMA request multiplexer configuration" in it.

This gives a list of the DMA request sources for MUX 0 (and MUX 1 for bigger chips).

eg.

UART0 Rx is 2

UART0 Tx is 3

UART1 Rx is 4

UART1 Tx is 5

..

ADC0 is 40 (0x28)

>>for other channel its 0X36

Double-check this because it looks wrong: ADC1 is 0x29, ADC2 is 0x2a (on MUX 1 only) and ADC3 is 0x2b (on MUX 1 only).

Personally I don't like the code

DMAMUX_CHCFG = DMAMUX_CHCFG_ENBL | DMAMUX_CHCFG_SOURCE(28)

because it doesn't show whether the value 28 is hex or decimal, and also it is processor type dependent, in case a derivative were to have a different channel (which is not to necessarily to exclude is the future).

I prefer

DMAMUX_CHCFG = DMAMUX_CHCFG_ENBL | DMAMUX_CHCFG_SOURCE_ADC0

where

#define DMAMUX_CHCFG_SOURCE_ADC0  DMAMUX_CHCFG_SOURCE(28)

or simply

#define DMAMUX_CHCFG_SOURCE_ADC0    0x28

or to better match the user's manual, even

#define DMAMUX_CHCFG_SOURCE_ADC0   40

In this case the user doesn't even need to ask him-/herself where this strange number comes from (unless he/she really wants to understand all details). When the details are desired, the user can search for the define in question and immediately arrives at the complete list in a header file associated with the register and then still no further questions needed...

Regards

Mark

[abdullahansari]

Hi Mark.

I have a code running that is using ADC to trigger DMA. and when destination buffer (configured in DMA settings) is full, An Interrupt is generated. In that ISR of DMA I am copying that buffer into SD card and then giving the DMA its next destination buffer (which is one of the buffer from the buffer pool i have created).

What i am doing is I am configuring the DMA again (with all its parameters same but destination buffer changed), i did it by just changing the destination buffer in DMA settings and pretending the rest remaining same as before but it didnt. So ihave to reconfigure DMA from zero again and again while in DMA ISR.

Do you suggest any better and optimal way of just changing the DMA destination buffer (keeping the old settings of transfer size and reset address same in DMA setings).

Regards

Abdullah

[mjbcswitzerland]

Hi

I would recommend setting up a single buffer which automatically restarts after completion (circular) with interrupts at half-full and full. This way you don't need to modify the DMA confuguration during operation and also have no risk of losing samples when moving from one buffer to the other.

This is detailed in http://www.utasker.com/docs/uTasker/uTaskerADC.pdf

Regards

Mark

[abdullahansari]

Hi Mark.

Thanks for a very nice and simplified explanation. That really helped me. I liked your opinion of defining the source as a macro.

Thumbs up for your stuff.

Regards

Abdullah