Kinetis K60 and I2S Network mode

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Kinetis K60 and I2S Network mode

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jlevie
Contributor I

Does anyone have experience using a K60's I2S port as a network master? I have an application that requires outputting multiple (8) audio streams from a CPU and the I2S network functionality looks to be just what I need. There is next to no documentation on it tho.

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Paul_Tian
NXP Employee
NXP Employee

Hi, Jeff

Our Kinetis K series(silicon 2.x) does not support netwrk mode. Because maximum frame Size can be 32 Words, it is no need to use network mode. So please transfer to K60 which is silicon 2.x version.


Hope my reply can help you.

Best Regards

Paul

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twright
Contributor I

Hi Zhe,

    I'm in a situation where I am using a K60 which is silicon 2.x version and with a frame size of 16 where I'm using frames 1, 2, 3, 4, 9 and 10.   When I output data to frame 1, the data in the FIFO is outputted on frames 1, 3 and 9.   When I output data to frame 2, the data in the FIFO is outputted on frames 2, 4 and 10.  When I output data to frame 3, 4, 9, 10, I get no data out at all (i.e. on the I2S bus as well as on the audio output).  The data I am sending to frame 1 is a 1KHz sine wave and is being put only into the buffer for frame 1.  The rest of the buffers contain only zeros.  It is similar when I'm sending data to frame 2.

   It would seem that the K60 SAI interface thinks there is only two frames (or channels) enabled and not 16.  Please note that TMR is configured to mask all frames except 1, 2, 3, 4, 9 and 10.

   I have written 16 to FRSZ within I2S0_TCR4 register.  Since there is no network mode, what else do I have to do to get the K60 to use more than two frames?

   I have included my register settings for the SAI interface.

AVG_VGX_mode_I2S_Register_Settings.jpg

  Any help would be greatly appreciated.

                Tim Wright

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egoodii
Senior Contributor III

I'm not sure how your are counting 'frames', but I will just say that there is one FIFO in each direction, and it is offloaded for each datum in the frame, so I believe you need to send 6 items to the FIFO in each 'frame sync' (sample rate) interval, in order, to keep the outbound traffic full.  A slick DMA setup can do all this interleave for you.

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twright
Contributor I

Hi Earl,

     Thanks for the reply.  Your posts have been a great help to me.

      So the long story is that I have the DMA controller setup to transfer six PCM samples across six different buffers in a Ping-Pong fashion into FIFO0.  My setup of the DMA controller is based on your description in one of your other posts.

      So, yes, I am transferring six PCM data samples every frame sync.  The other five PCM samples are zero.  In other words, all buffers are all zero except for first buffer which I'm putting a 1KHz sine wave into from an input.

      I have two inputs and six outputs.  I have tasks that once enabled will take the data from one input buffer and send it to a specific output buffer.  In this scenario, I'm taking the data from buffer of input #1 and putting it into the output buffer #1.

     The input DMA controller has two channels in a Ping-Pong setup.   The output DMA controller has six channels in a Ping-Pong setup. 

     My board has several modes and when I use two input channels and two outputs channels, I can send any input channel to any output channel as long as no more than two output channels are "unmasked".  So, I have received data on timeslot 7 and have sent it successfully to any two timeslots that are unmasked (e.g. TS #1, TS #2, TS #9, TS #10). The same is for data received on timeslot #10.  In one of your previous posts, I see that on a rev 1.x K60, you supported four inputs and four outputs and I've used this information to get my interface working but with the rev 2.x K60 it doesn't have a bit to select "network" mode.  I have the frame size set to 16 but it would seem that more is required to support a "network" mode as there is no other information within the documentation of what to set to support more than two timeslots.

      I have used your posts to help me get this interface working but the rev 1.x K60 I2S interface is different from the rev 2.x K60 SAI interface and it is not clear how to set "network" mode.  Okay, Freescale is clear that there is no more network mode so I'll say, it is not clear what to set to support more than an I2S interface.  I was hoping that someone within or outside of Freescale has the SAI interface working with more than two channels/frames.  I am sure that I have misconfigured the SAI interface but based on the limited documentation on supporting more than two channels on the rev 2.x K60, I'm at a loss of which bits to set.  Please excuse my frustration but I've been trying to solve this issue for a while.

     Again, thanks for being ever present and trying to help.

                Tim Wright

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egoodii
Senior Contributor III

Very nice!  Sounds like you are making all the right moves!  Except that it isn't working for you(!).  I am sorry that I don't have any CoDec hardware to test these things on -- I would really like to see Rev 2.x SAI 'at work'.  I agree, that while this silicon didn't make 'network mode' an explicit selection, it seems apparent that just setting 'word length' and 'word count' should be the same effect. In working with 'time slot 10' I guess I can assume your bit-clock is at least 160x your frame rate -- in fact the 'word count' FRSZ and word sizes (all 16) indicates 256x.  I am not at all familiar with the clock settings for this rev, but it looks like you have Kinetis TX as 'master' and RX as 'slave'?  I would personally recommend running both Kinetis interfaces as 'slave' and let the CoDec divide everything synchronously from its stable MCLK.

I see in your 'snapshot' above that your TX FIFO is 'full', and RX is 'not empty'.  You might want to zero-out the watermark controls, as DMA has no reason to be 'bunched up'.

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egoodii
Senior Contributor III

I have NOT tried to convert my system to the Rev 2.x 'SAI' block.  What I have working 'very well' is 6 channels on the Rev1.x silicon I2S module, using the sophisticated looping options of the DMA to fully interleave/de-interleave a double-buffering array of audio samples (in my case transferred to/from Ethernet RTP).

https://community.freescale.com/message/82190#82190

I believe the 'defines' there allow for reasonable customization (except whatever I missed!).

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Paul_Tian
NXP Employee
NXP Employee

Hi, Earl

Attached is the sample code of Network mode of I2S for your reference.

Hope it can help you.

Best Regards

Paul

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