Hi
I have attached two FRDM-K64F binaries that can be loaded to test a slow pulse train:
- uTaskerV1.4.12_FRDM-K64F_1s_8ns.bin generates an 8ns pulse on the connector J1-pin 2 every 1s (1Hz)
- uTaskerV1.4.12_FRDM-K64F_1s_35ns.bin generates a 35ns pulse on the same output at the same rate
The first one, with fastest pulse, is obtained by simply togging a port twice in a PIT interrupt.
The second uses PIT DMA trigger to write to the port toggle register twice in a row each time it triggers.
Analysis of possibilities.
- It is best to use a PIT to trigger either an interrupt or DMA because it can generate very slow frequencies. FTM (16 bit counter) can only generate about 8Hz and above when the K64 is working with 120MHz system frequency.
- If a PIT is used as time base (and interrupt) there is no need to use it to trigger an FTM pulse generation since it is more work (overhead) and even if a method can be found to efficiently generate the two output changes (it could be done with additional DMA and unnecessary complication which will slow it even more) it will be slower that the port toggle.
- Port toggling doesn't limit the used output to be a particular peripheral port (and GPIO can be used).
- If absolutely no processor overhead is desired (no PIT interrupt handling) it is possible to do it by allowing the PIT to free run and generate DMA triggers (see second binary). This in fact continues to operate even when the processor is halted with the debugger as long as the timer can continue to run. Although it has no CPU overhead to toggle the ports, the actual rate is limited by the way that the DMA operates since its back-to-back port writes are not as fast as two CPI instruction writes, thus causing a longer pulse width of around 35ns instead.
- Lowest possible periodic jitter is expected with the DMA method since there is no interrupt latency which may be influenced by higher priority interrupts in progress or when critical code regions are being executed (that temporarily block interrupt handling), as well as during Flash erasure/programming periods.
Regards
Mark