COP on KL16

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COP on KL16

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petrkalandra
Contributor I

Hello!

I'm little bit confused about how COP watchdog behave in VLPS mode on KL chips (KL16Z in my case).

Accroding to reference manual, the COP couter is zeroed but no hint given about that it is counting or not when clocking is configured to run from 1kHz LPO (since LPO is running in VLPS). Will the COP count (or invoke chip reset) after at most 1024ms spent in VLPS or it will not? Thanks!

If the 1 kHz clock source is selected, the COP counter is re-initialized to 0 upon entry to either Debug mode or Stop (including VLPS or LLS) mode. The counter begins from 0 upon exit from Debug mode or Stop mode.

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Petr,

I think the counter of COP module uses counting down mode, when counter reaches up to zero, the COP reset event happens. The timeout is dependent on  COPT and COPCLKS bits in SIM_COPC register. If you set the COPT as 2b'11 and set COPCLKS as 1b'0, the COP uses 1KHz LPO clock, the period is (2**10)*1ms=1024ms.

You can use PIT to generate an interrupt, in the ISR, you can feed dog by writting 0x55 and 0xAA to SIM_SRVCOP, it is okay, the PIT period must be less than 1024ms.

Pls refer to section 12.2.17 COP Control Register (SIM_COPC) in reference manual of Kl16.

Hope it can help you

BR

Xiangjun Rong

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petrkalandra
Contributor I

Thanks for your reply!

I've read the RM again but still think it's a little bit unclear about COP behaviour when clocked from LPO.

I've done some practical tests and found out that COP reset does not happen even in VLPS longer than 1024ms (tried 2000ms). COP is working since endless loop invokes reset. 

While this behaviour is convenient for me (since I need to "sleep" for more than 1024ms), it's not explicitly stated in RM.

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I have checked the data sheet of KL16, the LPO clock frequency is from 0.9KHz to 1.1KHz.

BR

Xiangjun Rong

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petrkalandra
Contributor I

Hi,

that gives 909ms to 1111ms. I used approx. 2000ms and reset did not happen.

BR

Petr K.

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Petr,

Can the COP reset the chip if you enable COP and do not feed the COP in VLPS mode? If it is, pls post your code so that I can have a test.

BR

XiangJun Rong

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