Buffering CAN RX Messages - Missing Messages When TX Flow Control

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

Buffering CAN RX Messages - Missing Messages When TX Flow Control

跳至解决方案
2,803 次查看
Dealerz
Contributor I

My design has me using 3 RX mailboxes with MQX 4.0. I have the design almost laid out like the FlexCAN demo where I have a task setup for each RX mailbox and an interrupt to set the event for the task to know when it is ready to read data. I also have a CAN TX task that I pass messages off to when I need to transmit a message. I can receive all data on a CAN network with no issues when on vehicles.

The issue I run into is when I'm trying to handle multi-frame responses. When I receive the first frame 0x10 I send the flow control message 0x30 0x00 0x00, the issue though is the vehicle will then transmit the rest of the frames but I only receive the send frame 0x22, I'm missing the first frme after the flow control message 0x21. Why? I even place break points in the RX mailbox to break upon recieving an 0x21 or 0x22 message and it never breaks on a 0x21 message. It's like even though I have 3 RX mailboxes running I'm missing data right after I transmit the flow message.

Any ideas as to solve this issue of missing messages?

标签 (1)
0 项奖励
回复
1 解答
1,987 次查看
Martin_
NXP Employee
NXP Employee

Most probably it is not an issue of missing messages but issue of missing interrupts. I guess the application software destroys the interrupt flags by read-modify-write sequences.

Instead of doing read-modify-write of IFLAG1 register (as in MQX flexcan demo) do a simple write, as you want to clear just one bit at a time, when in the isr:

change from: can_reg_ptr->IFLAG1 |= tmp_reg;

change to: can_reg_ptr->IFLAG1 = tmp_reg;

在原帖中查看解决方案

0 项奖励
回复
3 回复数
1,988 次查看
Martin_
NXP Employee
NXP Employee

Most probably it is not an issue of missing messages but issue of missing interrupts. I guess the application software destroys the interrupt flags by read-modify-write sequences.

Instead of doing read-modify-write of IFLAG1 register (as in MQX flexcan demo) do a simple write, as you want to clear just one bit at a time, when in the isr:

change from: can_reg_ptr->IFLAG1 |= tmp_reg;

change to: can_reg_ptr->IFLAG1 = tmp_reg;

0 项奖励
回复
1,987 次查看
Dealerz
Contributor I

Ugh, didn't think of that thanks. I'll look it over today.

0 项奖励
回复
1,987 次查看
Dealerz
Contributor I

Yup that resolved it, thanks.

0 项奖励
回复