Hey,
I am trying to configure SPI1 on the K82 FRDM board.
I am useing PCS1. On the scope I see a 12 Mhz SCK clocks when my configuration is for 500Khz.
Also I don't see anything on the PCS1 line even though I have it confgured on the pin-mux file.
When using CTAR0 I see an 8 bit clock pattern but data and clock are out of sync.
/** *@brief Initializes the SPI peripheral *@return none */ void SPI_Initialize(void) { uint32_t srcClock_Hz; dspi_master_config_t masterConfig; /* Master config */ masterConfig.whichCtar = kDSPI_Ctar1; masterConfig.ctarConfig.baudRate = TRANSFER_BAUDRATE; masterConfig.ctarConfig.bitsPerFrame = 8U; masterConfig.ctarConfig.cpol = kDSPI_ClockPolarityActiveHigh; masterConfig.ctarConfig.cpha = kDSPI_ClockPhaseFirstEdge; masterConfig.ctarConfig.direction = kDSPI_MsbFirst; masterConfig.ctarConfig.pcsToSckDelayInNanoSec = 1000000000/TRANSFER_BAUDRATE; masterConfig.ctarConfig.lastSckToPcsDelayInNanoSec = 1000000000/TRANSFER_BAUDRATE; masterConfig.ctarConfig.betweenTransferDelayInNanoSec = 1000000000/TRANSFER_BAUDRATE; masterConfig.whichPcs = DSPI_MASTER_PCS_FOR_TRANSFER; masterConfig.pcsActiveHighOrLow = kDSPI_PcsActiveLow; masterConfig.enableContinuousSCK = false; masterConfig.enableRxFifoOverWrite = false; masterConfig.enableModifiedTimingFormat = false; masterConfig.samplePoint = kDSPI_SckToSin0Clock; srcClock_Hz = CLOCK_GetFreq(DSPI_MASTER_CLK_SRC); DSPI_MasterInit(DSPI_MASTER_BASEADDR, &masterConfig, srcClock_Hz); } /** *@brief Writes a byte of data to the SPI bus *@param data Byte data to write on bus *@return result Result of data written on SPI bus. */ char SPI_Write(unsigned char data) { // // unsigned char rdata = 0; // // dspi_transfer_t masterXfer; // // /* Start master transfer */ // masterXfer.txData = &data; // masterXfer.rxData = &rdata; // masterXfer.dataSize = 1; // //masterXfer.configFlags = kDSPI_MasterCtar1 | DSPI_MASTER_PCS_FOR_TRANSFER | kDSPI_MasterPcsContinuous; // // DSPI_MasterTransferBlocking(DSPI_MASTER_BASEADDR, &masterXfer); DSPI_MasterWriteCommandDataBlocking(DSPI_MASTER_BASEADDR, data); return data; }
CLOCK_EnableClock(kCLOCK_PortB); CLOCK_EnableClock(kCLOCK_PortD); /* SPI1 */ PORT_SetPinMux(PORTB, 23U, kPORT_MuxAsGpio); //NRF_IRQ PORT_SetPinMux(PORTB, 9U, kPORT_MuxAlt6); //NRF_CSN PORT_SetPinMux(PORTD, 5U, kPORT_MuxAlt7); //NRF_SCK PORT_SetPinMux(PORTD, 6U, kPORT_MuxAlt7); //NRF_MOSI PORT_SetPinMux(PORTD, 7U, kPORT_MuxAlt7); //NRF_MISO
CLOCK_EnableClock(kCLOCK_PortB);
CLOCK_EnableClock(kCLOCK_PortD);
/* SPI1 */
PORT_SetPinMux(PORTB, 23U, kPORT_MuxAsGpio); //NRF_IRQ
PORT_SetPinMux(PORTB, 9U, kPORT_MuxAlt6); //NRF_CSN
PORT_SetPinMux(PORTD, 5U, kPORT_MuxAlt7); //NRF_SCK
PORT_SetPinMux(PORTD, 6U, kPORT_MuxAlt7); //NRF_MOSI
PORT_SetPinMux(PORTD, 7U, kPORT_MuxAlt7); //NRF_MISO