PIT IRQ Time

[bkohan]

We are using the KL17Z128, KDS 3.1 and KSDK 1.2.  We setup the PIT to generate 250 usec interrupt. We toggle a GPIO pin in the interrupt routine.  The time between GPIO toggles is about 252.6 usec.  To get an IRQ period closer to 250 usec we set the period to 248 usec in the PIT "Bean".  Our CPU clock is set for 48MHZ, Bus clock is 24MHZ.  Any ideas on what's going on?

[jstark]

Have you looked at the code to see what value is being loaded into the Timer Load Value register? For a 24 MHz bus clock, you would want that register to be loaded with the value 5999 ((interrupt interval / peripheral bus clock period) - 1).

If that's the case, then perhaps the system clock is not exactly on frequency.

J.

[Alice_Yang]

Hello Bob,

Do you use the Processor Expert of KSDK?

If yes, you can configure the cpu clock and timer directly :

Have a great day,
Alice Yang

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