Counter stops once execution is suspended, never resumes

[mlnj]

So I'm using KDS Version: 3.2.0 on a Windows 7 Pro PC.

I've simplified my code to:

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int main(void) {
  /* Init board hardware. */
  BOARD_InitPins();
  BOARD_BootClockRUN();
  BOARD_InitDebugConsole();

  InitFTM1();

  /* Add your code here */

  for(;;) { /* Infinite loop to avoid leaving the main function */
    __asm("NOP"); /* something to use as a breakpoint stop while looping */
  }
}

void InitFTM1()
{
    SIM_SCGC6 |= (1<<FTM1);                    // Enable Power to FTM1
    FTM1_MODE = (1<<WPDIS) + (1<<FTMEN);    // FTM not old TPM mode
    FTM1_MOD = 75*100-1;                    // 75 Mhz clock  100 us clock period
    FTM1_SC = (1<<CLKS);                    // use system clock
}

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When I suspend execution I observe the following hex register values:

FTM1_SC      88

FTM1_CNT      varies

FTM1_MOD   1db4

FTM1_MODE   5

When I resume and suspend (multiple times) the FTM1_CNT is always the same as the first time I suspended.

I want it to resume counting.  What am I doing wrong?

[jorge_a_vazquez]

Hi Michael Liebert 

This is caused because you have configured in BDMMODE as 00 in your FTM module. When the MCU entry in the debug mode (for example when you pause), there is a specific field that defined the FTM counter's behavior. In this case if you suspend the execution, the timer counter is stopped, and you should have to start it manually, because resuming doesn't start the timer.

I recommend you to check the chapter 40.4.26 BDM mode in the reference manual.

Hope this could helps
Have a great day,
Jorge Alcala

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[mlnj]

Thanks for your reply.

I assume you meant 35.4.26. At least that’s where BDM Mode is discussed in the manual I am using. BDM Mode itself isn’t well defined but I’ve taken it to mean any time execution is suspended while debugging.

Whatever, my problem mysteriously went away. And it didn’t go away because I set FTM0_CONF to 0xc0, but I am doing that now in any case.

MY REAL PROBLEM is that I cannot get the FTM0_C1V register to update in the single edge mode PWM I am trying to make work. I understand that writing to e.g., FTM0_C1V writes to a shadow register (which I apparently cannot see, at least with KDS). But I cannot get that value to transfer out of the shadow register. I would most like it to be transferred out when the PWM Counter is reloaded, but I would also like to know how to make it happen immediately upon writing to the shadow register. (I’ve noticed that if all I do is switch to Output Compare Mode, that FTM0_C1V is updated though I am not sure exactly when the update takes place.)

I am trying to do this without your "drivers." I'm setting FTM=1 and CLKS[1:0] ≠ 0:0. I would note that in the manual I have (KV10P48M75RMRev. 7, September 2014) only discusses non-output compare mode and SYNCEN = 1. I'm trying to get a single edge-mode PWM going. At least initially, I don't care about synchronization with other PWMs. And I only see SYNCENn's defined. I do not see a single SYNCEN bit.

Also, if it’s useful to know, when I suspend my program and try to modify FTM0_C1V directly, nothing happens. I.e. it remains at zero. (Doing the same thing in Output Compare Mode does cause the value displayed for FTM0_C1V to change to the value entered.)

I look forward to any suggestions you might have.

[jorge_a_vazquez]

Hi Michael Liebert

Sorry for the late reply;

Glad to heard that the update of your FTM1_CNT is gone; updating CnV is a little more complicated, you need to enable the PWM synchronization, This feature provide a method to update the MOD, CNTIN,CnV, SWOCTRL, etc. You can read the section 35.4.10 Registers updated from write buffers of reference manual (Sorry I didn't know what MCU you were using, that's why I mentioned a wrong chapter in the previous mail).

I post here a code that setup the PWM synchronization triggered by software, (using FTM0 and channel 0 or 1)

/* Enable PWM synchronization of registers C0V and C1V */
FTM0->COMBINE |= FTM_COMBINE_SYNCEN0_MASK;

/* Use enhanced PWM synchronization method. Use PWM sync to update CNTINC, INVCTRL and SWOCTRL register values */
FTM0->SYNCONF |= (FTM_SYNCONF_SYNCMODE_MASK | FTM_SYNCONF_CNTINC_MASK | FTM_SYNCONF_INVC_MASK | FTM_SYNCONF_SWOC_MASK);

/* Enable PWM synchronization of output mask register */
FTM0->SYNC |= FTM_SYNC_SYNCHOM_MASK;

/* Enable needed bits for software trigger to update registers with its buffer value. software trigger activates MOD, CNTIN, and CV registers synchronization*/
FTM0->SYNCONF |= (FTM_SYNCONF_SWRSTCNT_MASK | FTM_SYNCONF_SWWRBUF_MASK | FTM_SYNCONF_SWINVC_MASK | FTM_SYNCONF_SWSOC_MASK | FTM_SYNCONF_SWOM_MASK);‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

So after you update C0V or C1V you trigger the sync with

/* Software trigger to update registers */
FTM0->SYNC |= FTM_SYNC_SWSYNC_MASK;‍‍‍‍‍

Hope this information helps you, please let me know if this could resolve your problem

Have a great day,
Jorge Alcala

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