IN mkv31 HALL_XOR how to detect . i trying register level if any changes and anything configure guide me help for us.
void initGPIO(void) {
SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK;
PORTB->PCR[18] = PORT_PCR_MUX(3); // FTM2 channel 0
PORTB->PCR[19] = PORT_PCR_MUX(3); // FTM2 channel 1
PORTB->PCR[1] = PORT_PCR_MUX(3); // FTM1 channel 1
SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTE_MASK;
//PORTC->PCR[6] = PORT_PCR_MUX(1); // GPIO
//GPIOC->PDDR |= (1U << 6); // Set as output
//PORTE->PCR[6] = PORT_PCR_MUX(1); // GPIO
//GPIOE->PDDR |= (1U << 6);
}
void initInputCapture(void) {
SIM->SCGC6 |= SIM_SCGC6_FTM1_MASK | SIM_SCGC6_FTM2_MASK;
FTM1->MODE |= FTM_MODE_WPDIS_MASK;
FTM2->MODE |= FTM_MODE_WPDIS_MASK;
FTM1->MOD = 0xFFFF;
FTM2->MOD = 0xFFFF;
FTM2->COMBINE |= FTM_COMBINE_DECAPEN0_MASK; // Assuming this enables XOR on FTM2 CH0 and CH1
SIM->SOPT4 |= SIM_SOPT4_FTM2CH1SRC_MASK;
FTM2->CONTROLS[0].CnSC = FTM_CnSC_CHIE_MASK | FTM_CnSC_ELSA_MASK;
FTM2->CONTROLS[1].CnSC = FTM_CnSC_CHIE_MASK | FTM_CnSC_ELSA_MASK;
FTM1->CONTROLS[1].CnSC = FTM_CnSC_CHIE_MASK | FTM_CnSC_ELSA_MASK;
FTM2->SC |= FTM_SC_TOIE_MASK;
FTM1->SC |= FTM_SC_TOIE_MASK;
NVIC_EnableIRQ(FTM2_IRQn);
NVIC_EnableIRQ(FTM1_IRQn);
FTM2->SC = FTM_SC_CLKS(1) | FTM_SC_PS(0);
FTM1->SC = FTM_SC_CLKS(1) | FTM_SC_PS(0);
}
void FTM2_IRQHandler(void) {
if (FTM2->SC & FTM_SC_TOF_MASK) {
FTM2->SC &= ~FTM_SC_TOF_MASK; // Clear the overflow flag
GPIO_PortToggle(GPIOC, 1U << 6); // Example: Toggle GPIOC pin 6 for overflow visualization
}
if(FTM2->CONTROLS[0].CnSC & FTM_CnSC_CHF_MASK) {
GPIO_PortClear(GPIOC, 1U << 6);
a+=b;
FTM2->CONTROLS[0].CnSC &= ~FTM_CnSC_CHF_MASK; // Clear flag
GPIO_PortClear(GPIOC, 1U << 6);
}
if(FTM2->CONTROLS[1].CnSC & FTM_CnSC_CHF_MASK) {
GPIO_PortClear(GPIOC, 1U << 6);
FTM2->CONTROLS[1].CnSC &= ~FTM_CnSC_CHF_MASK; // Clear flag
GPIO_PortClear(GPIOC, 1U << 6);
}
GPIO_PortClear(GPIOC, 1U << 6);
}
void FTM1_IRQHandler(void) {
// Handle input capture for FTM1 CH1
if(FTM1->CONTROLS[1].CnSC & FTM_CnSC_CHF_MASK) {
GPIO_PortClear(GPIOE, 1U << 6);
FTM1->CONTROLS[1].CnSC &= ~FTM_CnSC_CHF_MASK; // Clear flag
GPIO_PortClear(GPIOE, 1U << 6);
}
}
Thankyou
BR
PANDI
