Hi,
As you said that the FIR has 262144 taps, the ADC generates sample data with 88.2KHz, assume that DSP can finish the each tap(one mac instruction) with one clock cycle, the requested DSP frequency is 262144*88.2KHz= 23GHz, unfortunately, the DSC can not reach up the performance.
If you store for example 1000 ADC samples, then ADC stops, the DSP does the FIR computation, after getting the filtered 1000 samples, then you can start ADC again..., in this way, it is okay.
Pls try to consider the hardware FIR device.
BR
XiangJun Rong