When do we see DSP that support long FIRs?
I've got bad news and good news for youy:
You won't see them, but on the other hand ... you don't need them.
FIR Filters are also convolution filters, so if a FIR gets too long, you can change it's representation to a generic convolution and then you convert it into a Non-Uniform Partitioned Convolution.
https://thewolfsound.com/convolution-the-secret-behind-filtering/
http://pcfarina.eng.unipr.it/Public/Papers/188-Mohonk2003.pdf
https://ericbattenberg.com/pdf/partconvDAFx2011.pdf
https://www.convict.lu/Jeunes/ultimate_stuff/RFT.pdf
This will allow you to use DSP/CPUs less powerful than what you'd need to handle a "basic" FIR filter implementation, but it's no magic.
By the way, by partitioning the FIR filter implementation you can subdivide it between multiple DSP/CPUs if that option is cheaper than using more powerful/costly hardware.
IIRC in the '90 there were audio processing boards that handled 256K taps FIR filters using six DSP56000 to run a a partitioned convolution
with PC 262144 taps each filter 88.2 kHz the CPU less than 1% of power
can you do such a long taps?
Hi,
I suppose that DSC family can do FIR algorithms, If you use assembly language, the DSC can implement FIR with one cycle for each node.
The DSC is fixed point processor, in other words, the FIR is implemented with 16 bits* 16 bits,you can use MC56F84xxx/83xxx/82xxx/81xxx/80xxx to develop the code.
DSC link:
You can use CodeWarrior for MCU ver10.x to develop the code.
You can use the Multilink Universal device from third party PEmicro
You can use the rtcsel library for the FIR api.
Hope it can help you
BR
XiangJun Rong
PC with 262144 taps each filter 88.2 kHz the CPU need less than 1% of power.
Can your chip do 262144 taps?
Hi,
As you said that the FIR has 262144 taps, the ADC generates sample data with 88.2KHz, assume that DSP can finish the each tap(one mac instruction) with one clock cycle, the requested DSP frequency is 262144*88.2KHz= 23GHz, unfortunately, the DSC can not reach up the performance.
If you store for example 1000 ADC samples, then ADC stops, the DSP does the FIR computation, after getting the filtered 1000 samples, then you can start ADC again..., in this way, it is okay.
Pls try to consider the hardware FIR device.
BR
XiangJun Rong