Quadrature decoding on the MC56F83xxx: handling index pulse

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Quadrature decoding on the MC56F83xxx: handling index pulse

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bs_
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I'm interested in using the MC56F83789VLL product in a BLDC motor control application. My commutation feedback device is an incremental encoder with an index (Z) output, which I'd like to connect to one of the quadrature inputs on the MC56F83xxx. According to the reference manual (Document Number: MC56F83XXXRM), Section 29.6.5.6 "Quadrature-Count Mode with Index Input" it is possible to configure the quadrature decoder to reset the position register to 0 on each occurrence of the index pulse.

However, my control algorithm expects to have two position registers available--one continuously updated position register which updates with each quadrature edge (A or B), and resets to 0 when it counts up to its maximum value, and another register which latches the value of the position register each time the index pulse (Z) is observed.

Is it possible to configure the quadrature counters of the MC56F83xxx in this manner so that the index pulse causes the position register to be copied into another register, but does not reset the position register to 0?

Thanks!

#MC56F83789VLL

#MC56F83xxx

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I think it is okay to count encoder signal and implement the capture function with index signal.

You have three signal from encoder:PhaseA, PhaseB and inderx

Pls refer to section 29.6.5.6 Quadrature-Count Mode with Index Input as you have seen.

As you know that the quadTimer has 4 independent timer, T0, T1,T2 and T3.You can use two timers to implement the function, the T0 is configured in quadrature mode. Because the CMP is set up to 0, the T0 will generate event for each falling/rising edge of both PhaseA and PhaseB signals.

In detail, T0 is set up in quadrature mode, phaseA is connected to a pin specified T0.CTRL[PCS], phaseB is connected to pin specified with T0.CTRL[SCS], T0.CTRL[CM]=3b'100, quadrature mode.

The T1 is set up in Cascade-Count Mode, the T1.CTRL[PCS]=4'b0100; //counter0, T1.CTRL[SCS] is set up to the pin connected to index signal, you can set up the T1.SCTRL[capturemode] for the edge of capture, you can set the T1.CMP as the edge number for the BLDC commutation. When the index signal is coming, the edge number will be captured to capture register of T1.

Hope it can help you

BR

XiangJun Rong

 

 

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1,469 次查看
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I think it is okay to count encoder signal and implement the capture function with index signal.

You have three signal from encoder:PhaseA, PhaseB and inderx

Pls refer to section 29.6.5.6 Quadrature-Count Mode with Index Input as you have seen.

As you know that the quadTimer has 4 independent timer, T0, T1,T2 and T3.You can use two timers to implement the function, the T0 is configured in quadrature mode. Because the CMP is set up to 0, the T0 will generate event for each falling/rising edge of both PhaseA and PhaseB signals.

In detail, T0 is set up in quadrature mode, phaseA is connected to a pin specified T0.CTRL[PCS], phaseB is connected to pin specified with T0.CTRL[SCS], T0.CTRL[CM]=3b'100, quadrature mode.

The T1 is set up in Cascade-Count Mode, the T1.CTRL[PCS]=4'b0100; //counter0, T1.CTRL[SCS] is set up to the pin connected to index signal, you can set up the T1.SCTRL[capturemode] for the edge of capture, you can set the T1.CMP as the edge number for the BLDC commutation. When the index signal is coming, the edge number will be captured to capture register of T1.

Hope it can help you

BR

XiangJun Rong