kvuurens_0-1660853676036.png
After using the logic analyser I see that the DSDA works, but the DSCL does not. DSCLM is low as you can see in the screenshot and DSCLP is high, as per the documentation.
The "slave" in the screenshot is actually functioning as a master using I2C terms, which is tring to get data from 0x0C (address 12). Any idea why the DSCL pair is not doing anything? I checked loose wiring etc, but could not find anything..
Also; the actual data part is empty as seen below on the screenshot:
kvuurens_1-1660854197179.png
To add; other chips have the same behaviour. Swapping SDA and SCL on the I2C side does result in the switching of the signal of the differential side (I2C SDA on SCL input, giving DSCL on the line).