Problem with reading flash via EzPort.

[BIS]

Good day.

I need to programm flash memory of mcf5211 via EzPort. Writing to configuration register, reading status, bulk erase and page program are seemed to complete correctly, because the propper flags in status register are set. The problem is to read out programmed data from flash, all data read is 0xFF.

May you give comment how to solve this problem.

Programming is implemented with byte-blaster on LPT-port. I tryed to use READ and FAST_READ commands.The cristal is running at 8Mhz(internal). I did not find the signal waveforms in the documentation. May be the problem is that data on EZPQ is sampled when data from flash is not ready?

Thank you for help.

[daks]

Hey,

        I have some problem with Sector Erase, My code is working well with Bulk Erase.. but when i tried to implement my code with sector erase and page program any specific sector, its not writing to the Flash...

I tried all that is given in the MCF52235 manual but i am not able to get to the specific point why i am not able to sector erase and verify it.......

Replies are really appreciated.

Thanks.

[mccPaul]

Look in this thread:

http://forums.freescale.com/freescale/board/message?board.id=CFCOMM&thread.id=2740&view=by_date_asce...

for some example code I posted for writing to the Coldfire Flash on a 5282 - the technique is similar, or may even be identical for the 52235.

Paul.

[wyliek]

Hi there

I would like to know if you managed to solve your EZPort problems. I am having a few of my own at the moment.

Thanks
Kyle

[BIS]

All problems are solved.

[mnorman]

You should check your EzPort clock and data alignment.  Are you able to read data out using the core/BDM?  If so, do you see the same pattern?  For EzPort debugging purposes, I suggest:

1) WREN command

2) RDSR command and verify WEN is set

3) WRCR command with data = ~0x3F

4) RDSR until WIP bit is cleared

5) WREN command

6) RDSR command and verify WEN and CRL are set

7) BE command

8) RDSR until WIP bit is cleared

9) WREN command

10) PP command, 24-bit address, write data

11) RDSR until WIP bit is cleared - verify CRL is only bit set (no WEP)

The start address must be longword aligned.  Maximum data to be written is 256 bytes.

[Jetoleg]

Sorry for re-animating this old topic, but I am facing similar problems with EzPort for MCF52259 chip.

All commands works fine, but PP. Sector Erase works on loaded chip, but second attempt to erase same sector returns WEF=1 flag in RSR. Page Program always returns WEF=1. Chip clock is 48MHz. I figured  WCR value =0x4C should produce FCLK=153kHz which is within specified range of 150 to 200kHz.

State of RSR before executing PP command is 0x22. Any help would be greatly appreciated.

I am almost done with Windows based application for EzPort. Application may use both LPT port or USB FTDI chip to program ColdFire chips over EzPort. If any interest I may post this design for public usage after my problem with PP is resolved.

[Jetoleg]

Here is a little bit more description what is going on with my application. I found that issuing PP command on loaded chip before SE or BE, returns WEF=0 flag. However nothing being written and flash content is exactly the same as before PP command being issued. After BE same PP with same data bytes returns WEF=1 and FLASH remains in erased state. Is anyone had similar issue? Obviously, since SE and BE commands work just fine, my WCR value is correct.

[BIS]

As far as I remember in my case the problem was when I erased entire flash memory, reseted the controller and then attemped to program. And the programm failed (as I understood) because after chip-erase flash protection bits are set. And these bits are taken into account only when controller starts up. That is why if you program immediately after erase your write operation would success. Take a look at chapter 17 "ColdFire Flash Module" (CFMPROT-CFM Protection Register)

For programm/verify I use the following algorithm:

0. Verify your "spi" clock sppen confirms the controller specification.

1. EnableEzPort.

2. WriteConfig - to configire Fclk.

3. CheckStatus.

4. BulkErase or SectorErase if you shall programm.

BulkErase: WriteEnable, CheckStatus, CMD_BE, WaitForOperationDone, CheckStatus(WEP,WIP)

if (ok) WriteEnable, UpdateConfig(Fclk)

SectorErase: CheckStatus(WEN), CMD_SE, WaitForOperationDone, CheckStatus(WEP,WIP)

!!! don't use SectorErase for blank(filled with 0xFF) sectors.

5. Programm or verify.

6. DisableEzPort.

I hope this will help you.

And ther is an appeal to motorola engeneers to describe the use of EzPort programming mechanism more detailed.

[Jetoleg]

I got it working. My bad. Thanks for all your help. I will post my design as soon as I finalize my code.

[Jetoleg]

Thanks for you reply. Following your advice I got through my problem with chip lock up condition after erase cycle. As you mentioned key was to to stay in EzProg mode after bulk erase (I wonder why this not mentioned in the chip's manual!). But I still can't achieve data retention. Chip stays blank after PP was executed.

I wonder if my prescaler data is right. Manual is a bit vague on the description.

Here is how I calculate the value: Chip clock is 48MHz, so I need 8 divider on.

Accounting that flash controller divide its clock by 2 it gives my 48/(2*8)=3 MHz. Highest recommended FCLK=200kHz, so final divider value would be 3/0.2=15. Taking it all together I got Configuration Register value &B01001111. Is my calculation correct? Currently I am running at very conservative SPI clock 1MHz. Should it match FCLK?

At this point I am trying to execute simplest possible operation - writing 0 to address 0.

Here is my string for PP:

&H02,00,00,00,00,00,00,00 (PP command, 24 bit address 0, 4byte data=0).

Do I missing anything? I was reading some discussions about mystical "backdoor" addressing for EzProg writes. It doesn't make any sense to me because read operation works with straight addressing.

[Jetoleg]

OK, here is my promised design for EZPort PC programmer. It supposed to run on Windows XP. It works both USB or LPT (multiple port addresses). I haven't test installer on blank PC yet. So let me know if there is any problem with components. I included parallel port driver in installation package, but left FTDI drivers outside. You will need to install them prior running my installer for programming application. I made skeleton help for EzPort hookup it's also attached to this message.

[BIS]

May Flash memory be damaged permanentely if we tried to programm with flash clock ( Fclk ) slower 150 kHz or faster then 200 kHz?

An error occurs if I try to programm memory without Bulk Erase, right after configuration register is loaded(memory was erased previously).

You see, we consider that, erase or programm operations are performed correctely, because a Bulk Erase command completes in ~120ms, a Sector Erase command completes in ~20ms.

Please,offer the waveforms of operation with Ezport.

You suggest us to programm ~0x3F, that is 0xC0. In that case bit 7 of Config Register will be set, but the documentation says it should be cleared. And the rusulting clock will be 500 kHz. What did you meen?

P.s. we do not have a BDM connection in our application, so we can't read out memory to verify what was programmed.

[mnorman]

The "~0x3F" was supposed to mean "approximately 0x3F" and not the C language inversion operator.  It was a bad choice, sorry.  The actual value written here depends on your clock settings.

Running with a Fclk out of the specified range may result in incorrect operation, but I would not expect permanent damage as a result.

Based on your timing information, it sounds like you are able to erase properly.  What address are you trying to program? 

[BIS]

Thank you for reply.

We have overcome the problem. Now we are able to programm, erase and read out flash via EzPort. It seems that we made some steps (when we tried to disable flash security) which brought FLASH memory in a strange state. We supose that not all of control bits are available via EzPort.

An error occurs in following cases:

1) If sector is erased ( i.e. all bytes are 0xFF ), then SectorErase or PageProgramm commands do not work. WriteErrorFlag(WEF) is set.

2) If sector is erased with SectorErase command and than PageProgramm is issued - everything is all right. But if sector is erased with SectorErase command than EzPort is disabled and enabled and PageProgramm is issued - an error occurs.

What can you suggest in these cases?

And 2 more questions:

1) Is it nessesary to provide aligned data to start of page when PageProgramm? The maximum size of data when page programm is 256 bytes, that is 64 long words. So may we programm 64 long words starting with address 0x20?

2) Please, describe the procedure of disabling flash security.

[mnorman]

I'm confused.  In your case 1, are you saying that both SE and PP fail if you enter EzPort mode and the target sector was previously erased?  It seems like your case 2 is saying that you have to issue the SE command immediately prior to using the PP, but you also make it sound like you were able to erase a previously erased sector.  This conflicts with case 1.

1) The start address must be 32-bit aligned.  The address can be anywhere within a page.  A maximum of 256 bytes can be programmed at a time because the page size is 256 bytes long.  If you start within a page and write a full 256 bytes, then the address will wrap around to the lowest address in the same page once it reaches the end of a page.

2) Flash security will be disabled if the Reset Chip command is issued following a Bulk Erase.  Here are the steps:

// 1. Boot-up from reset with EZPORT enabled.

// 2. Check reset value of SR (FS should be set)

// 3. Set WEN bit and write to configuration register

// 4. Once WIP goes low, check CRL is set

// 5. Set WEN and issue Bulk Erase command.

// 6. Poll SR  until WIP goes low and ensure WEF is not set. Check value of FS.

// 7. Issue Reset Chip command.