Problem with instruction executing timing

[FloP]

Hello!

I have done a little program to verify my instruction executing timing.

My program is composed of :

-Set an output

-Reset the same output

-Increase an integer variable (6times)

-Set the output

I capture my output an logical analyser.

The time for execute this program (47 processor cycles between the set and the reset) is about 1,975us. That mean one cycle timing is about 42ns. That done about 24Misps, in the data sheet it's write 56Misps.

I don't understand why I haven't the better performance because I use an external oscillator at 25Mhz like the Evaluation board (MCF25535EVB) and the MCF initialisation is the same.

I have check all the register and is good. Anybody have an idea?

Florent

[scifi]

I don't think that calculating the number of cycles a program would take to execute is so easy. Setting and resetting an output involves synchronization between the CPU and a slower peripheral bus. I'm not sure where you'd find information on how long it takes. Increasing an integer variable is straighforward when the variable is held in a CPU register. It could be more complicated when it's in a RAM: you have to take into account the latency of accessing the type of memory involved.

If I was to measure CPU frequency, I would put together a program consisting 100 NOP's in a long 'for' loop. And I would use a stopwatch to time that.

[Obetz]

---

scifi wrote:

Setting and resetting an output involves synchronization between the CPU and a slower peripheral bus. I'm not sure where you'd find information on how long it takes.

---

the Coldfire V2 derivatives have very slow peripherals and extremly slow peripherals (e.g. ports, 12 waitstates or so).

Sadly the docs don't tell you what you need to know before you start your design.

Oliver

[FloP]

Thank you for you advice.

I have configurate a timer at frecency syteme divided by 2 (30Mhz => 33ns) and maximum modulo 30000 for a timer timing cycle of 1ms. In each interupt I toggle an output for use an external capture (it's for verify my clock systeme).

I checked that and I it's good.

After, in my main program, I capture my timer 2 times (for know how many times take a capture), I execute 100 nop (and in an other test 200 nop) and capture the timer.

The result are :

The timer indicate 7 between two captures demand, 182 for 100nop and 357 for 200nop.

If I decreasse 7 to the result of 100nop and 200nop I find 175 and 350. That mean 1nop take 3.5 clock processor (1nop = 58ns) and I conclude I have a processor which can execute about 17Mips.

It's very strange!

I have an other problem, I have a pre-divider frequency of my external oscillator for use after the pll. But this pre-divider don't have any effect on my frequency, if I done 4 or 0 in the register CCHR I have the same result... But if a increase the pll multiplier performance are increase but all périphéral (COM...)doesn't work, that mean my processor frequency is not good.