MCf-5282 QADC-module working as gpio-ports

[eddy]

Hi,
I have mcf5282 mounted on sodimm carrier (som5282) and uclinux running in it.
There are lot of gpios in mcf5282, but those I want to use are hard to utilize.
I wuold like to use QADC-module ports as digital I/O.
The user manual says that those ports are configured with Port QA Data Direction Register and Port QB Data Direction Register. Then ports are readable/writable through Port QA Data Register and Port QB Data Register. UM says also that the registers are IPSBAR + 0x19_00xx. I suppose that means 0x190000 and not 0x19000000.

Code:

#define IPSBAR 0x40000000#define QADC      IPSBAR + 0x190000#define PORTQ     IPSBAR + 0x190006#define DDRQ      IPSBAR + 0x190008unsigned short int hword = 0;unsigned short int *ptr;unsigned short int temp = 0;ptr = (unsigned short int*)QADC;memcpy(&hword,ptr,2);printf("QADCR %X\n",hword);ptr = (unsigned short int*)DDRQ;temp = 0x1B00 // ports a configured as ouput and ports b inputmemcpy(ptr,&temp,2);

It just gives SIGSEGV. So are those memory addresses valid after all?
And how this QADC-module can be configured as digital I/O module?

[macl]

Here is how the registers are defined in the 5282 header file.

/*********************************************************************
*
* Queued Analog to Digital Converter (QADC) Module
*
*********************************************************************/

/* Read/Write access macros for general use */
#define MCF5282_QADC_QADCMCR (*(vuint16 *)(void *)(&__IPSBAR[0x190000]))
#define MCF5282_QADC_PORTQA (*(vuint8  *)(void *)(&__IPSBAR[0x190006]))
#define MCF5282_QADC_PORTQB (*(vuint8  *)(void *)(&__IPSBAR[0x190007]))
#define MCF5282_QADC_DDRQA (*(vuint8  *)(void *)(&__IPSBAR[0x190008]))
#define MCF5282_QADC_DDRQB (*(vuint8  *)(void *)(&__IPSBAR[0x190009]))
#define MCF5282_QADC_QACR0 (*(vuint16 *)(void *)(&__IPSBAR[0x19000A]))
#define MCF5282_QADC_QACR1 (*(vuint16 *)(void *)(&__IPSBAR[0x19000C]))
#define MCF5282_QADC_QACR2 (*(vuint16 *)(void *)(&__IPSBAR[0x19000E]))
#define MCF5282_QADC_QASR0 (*(vuint16 *)(void *)(&__IPSBAR[0x190010]))
#define MCF5282_QADC_QASR1 (*(vuint16 *)(void *)(&__IPSBAR[0x190012]))
#define MCF5282_QADC_CCW(x) (*(vuint16 *)(void *)(&__IPSBAR[0x190200+(x*2)]))
#define MCF5282_QADC_RJURR(x) (*(vuint16 *)(void *)(&__IPSBAR[0x190280+(x*2)]))
#define MCF5282_QADC_LJSRR(x) (*(vuint16 *)(void *)(&__IPSBAR[0x190300+(x*2)]))
#define MCF5282_QADC_LJURR(x) (*(vuint16 *)(void *)(&__IPSBAR[0x190380+(x*2)]))

 

[DaveTonyCook]

Hi,

How do you configure the QADC module to be digital I/O.  There is no pin assignement register! and the QADCMCR does not have a setting to configure the port as digital I/O.

Please help... or do we have to guess )

[DaveTonyCook]

Found this

2.5.3 Example 1 – Using the QADC as General Purpose Output

Both the QA and QB port can be used for general purpose input/output. There are no pin assignment
registers. Both functions GPIO and QADC can be used simultaneously. The DDRQn registers determine
the data direction and PORTQn registers reflect the current pin states (if configured for input), or store the
data to be driven on the corresponding pins (if configured for output).

NOTE:
If the output direction is set and a value is assigned, the output data is stored
on corresponding pins. If such pins are used afterwards for an analog
function, the analog state of the stored digital value is read.

The digital state of the QB port (AN[3:0]) is 0000b after reset and pressing the IRQ7 button increases this
state by one. This means that all QB port pins are used for digital output. The state of the QB port is
displayed on the terminal window.

The MCF5282 allows using a 5 V digital output to be driven by a VDDH input. If an EVB is used try
settings jumper JP24 to position 3–4.

[vsabino]

Hi,

The manual says QB can be used as I/O (pages 5-6), but later on a few pages later (pages 9, 28) it says it can only be used as inputs.

What is the definitive answer? I/O or just inputs?

Thanks.

[TomE]

> (pages 5-6)

> (pages 9, 28)

What are you reading? There is no page 5-6 in the User Manual, and section 5 is the SRAM chapter. Page 1-5 is in the middle of the feature list.

http://cache.freescale.com/files/32bit/doc/ref_manual/MCF5282UM.pdf?fsrch=1&sr=1&pageNum=1

Do you mean pages 28-5, 28-6, 28-9 and 28-28? Or sections 28.5 and so on?

You should quote the full section number (and the name helps too) and paste in the text you're referring to. Like:

28.4.1 Port QA Signal Functions

The four port QA signals can be used as analog inputs or as a bidirectional 4-bit digital input/output port.

28.4.1.2 Port QA Digital Input/Output Signals

These four signals may be used for general-purpose digital input or digital output.

28.4.2 Port QB Signal Functions
The four port QB signals can be used as analog inputs or as a 4-bit digital I/O port.

28.4.2.2 Port QB Digital I/O Signals

Port QB signals are referred to as PQB[3:0] when used as a 4-bit digital input/output port.

If you read through various forum posts you'll find there are a lot of problems with the manuals. Answers you'll find in these forums (like the previous ones in this thread) are about as "definitive" as it is ever going to get.

Tom

[vsabino]

Hi Tom,

Sorry for the confusion referencing the manual.

I was referring to chapter 27, pages 5, 6, 9, 28. My version of the manual is revision 2 1/2004.

Yesterday after posting, I found revision 3 online. in there the QADC is now chapter 28.

I read what you outlined on sections 28.4 (now pages 28-3, through 28-5). Later on, 28-8 shows a contradiction.

Page 28-8 "28.6.3 Port Data Registers (PORTQA & PORTQB)" still says:

"Port QA signals are referred to as PQA[4:3, 1:0] when used as a bidirectional, 4-bit, input/output port"

"Port QB signals are referred to as PQB[3:0] when used as a 4-bit, digital input-only port."

Furthermore, Table 28-16 (page 28-26) still references PQB as input-only.

It's unfortunate that the manuals can't be trusted... Has anybody here in the forum used PQB as digital outputs?

I'm hoping Freescale can clarify.

[TomE]

Adding more contradictions:

28.6.4 Port QA and QB Data Direction Register (DDRQA & DDRQB)

DDRQA and DDRQB are associated with port QA and QB digital I/O signals. Setting a bit in these
registers configures the corresponding signal as an output.

So far so good. The register description diagram for "Figure 28-6. QADC Port QA Data Direction Register (DDRQA)" shows the "DDRAn" bits as "R/W".

But for Port QB, in the diagram "Figure 28-7. Port QB Data Direction Register (DDRQB)", bits "DDRBn" are shown as READ-ONLY and initialised to ZERO.

Why? These chips are made by cutting-and-pasting hardware modules together. The manuals are made by pasting the associated chapters describing those modules together.

So the best way to follow this process and the errors it introduces is to conduct "archaeology", by reading all of the manuals that use a particular module, and then note the "mutation rate" as some errors get fixed and new ones get introduced.

Here's a worked example for the "PIT" in the Coldfire chips, tracking the problems back to the original 1998 use in the MMC2001:

https://community.freescale.com/message/70616#70616

The QADC was originally designed and documented in 1995, and probably used in one of the 68300 or HC11 chips:

http://cache.freescale.com/files/microcontrollers/doc/ref_manual/QADCRM.pdf?fsrch=1&sr=4&pageNum=1

The QADC was also used and documented in "MMC2114 Advance Information Reference Manual (REV 1)" in 2002:

http://cache.freescale.com/files/32bit/doc/ref_manual/MMC2114.pdf?fsrch=1&sr=1&pageNum=1

In that implementation, both DDRQA and DDRQB are read-write. The text in that manual in section "19.8.4 Port QA and QB Data Direction Register (DDRQA and DDRQB)" is identical to that quoted above. So that section was cut/pasted into the MCF5282 manual, and missed being changed to match the MCF5282 changes.

> It's unfortunate that the manuals can't be trusted...

Those old manuals are a lot better than the later ones. See how they are now:

https://community.freescale.com/message/426065#426065

https://community.freescale.com/message/425415#425415

> Has anybody here in the forum used PQB as digital outputs?

> I'm hoping Freescale can clarify.

Freescale don't seem to be participating in this forum any more.

I think I've done enough "reverse engineering" on the manuals to answer your question.

The only real way to get definitive answers on these sort of questions is to run the tests on the hardware yourself. You'd have eventually found that DDRQB is a rather useless "Read only" place-holder register.

Tom

[vsabino]

Hi Tom,

I appreciate your reply. Very thorough. I’m surprised to see so many errors in the documentation!

I did not know about the copy/paste.

Regardless, I agree that the ultimate answer is by testing on our own. I started posting to this thread because I am using PortQB as digital output. I was baffled with what I read in the manual when I was digging deeper for other purposes. That’s why I wanted some sort of clarification. I didn’t know If I just got lucky and that port is flaky.

Victor

[TomE]

> I am using PortQB as digital output.

I am surprised. Usually Freescale copies the descriptive text in a chapter without making all the SOC-specific edits, but they usually get the register diagrams and descriptions correct. So I would have expected QB to not support output in the MCF5282.

Instead, you've proved it does.

In the 1995 QADCRM document, QB is described as input-only and the register description match this.

The QADC was used and documented in the MC68336 in 2000 and QB is documented as input-only there too.

The QADC was also used in MMC2114 in 2002. That documentation is different to the 1995 one. It shows evidence of a significant rewrite compared to the 1005 one. The internal cutting and pasting done during the rewrite has errors though, as it has.

19.6.1.2 Port QA Digital Input/Output Pins

Port QA pins are referred to as PQA[4:3, 1:0] when used as a
bidirectional 4-bit digital input/output port.

...

Each port QA pin is configured as an input or output by programming the
Port Data Direction Register (DDRQA).

19.6.2.2 Port QB Digital Input Pins

Port QB pins are referred to as PQB[3:0] when used as a 4-bit digital
input/output port.

...

Each port QB pin is configured as an input or output by programming the
Port Data Direction Register (DDRQB).

It looks like the 19.6.1.2 paragraph was copied to 19.6.2.2, the title was changed and the "A" was changed to "B", but the rest of the QB paragraph wasn't changed to say the port is input-only. The Register description is correct though.

But with the MCF5282 QB is input/output, by your testing.

The QADC Chapter in the MCF5282 is almost identical the the M2214 one. The sections are the same and so is the text, starting from the introduction. The section in the M2114 manual wrongly describing QB is input/output was copied to the MCF5282, where it is now correct, but the correct M2114 register descriptions were also copied to the MCF5282 without being changed where they're now wrong.

Understanding the reasons for these mistakes doesn't make the chips easier to use.

Tom