MCF54418 PLL loss-of-clock reset

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MCF54418 PLL loss-of-clock reset

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Linghuafang
Contributor I

Hi
We are using MCF54418, and now we encounter these two phenomena:
One is that when the board is powered on, the value of the reset register RSR is 0x18, and it is still 0x18 when the register is read during operation, but it seems to be able to operate normally after startup;
The second is that when the board is just powered on, the value of the reset register RSR is 0x18, and it reads to 0x08 during operation, and it seems to be able to operate normally after startup;
The iquestion is
One: What is the condition for the RSR register to read 0X18? If it keeps reading 0X18, can the CPU run stably?whether the PLL clock is normal?
Two: In the second phenomenon, the value of the RSR register changes after power-on, when will the value of this register change?
Thanks

 

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TomE
Specialist II

Yes, as Mike says, you should read the manual and understand the operation.

What doesn't make sense is where you say:

> when the board is just powered on, the value of the reset register RSR is 0x18,
> and it reads to 0x08 during operation

The problem there is that the bits are set at the time of the last reset, and don't change until the NEXT reset. So to read it as 0x18 and then read it as 0x08 means there must have been a power-on reset between those two reads. So when did you read it as 0x18 and then when did you read it as 0x08 because the power went off and on between those two reads.

0x08 means the last reset was a power-on reset. 0x10 means the last one was caused by the PLL losing LOCK or losing the CLOCK. What are you using to provide the clock, a crystal or a hybrid? If the latter, what power rail is it supplied from, and how does that sequence with the rest of the supplies?

Check the "PLL_CR" register to see how you have the chip programmed to respond to loss-of-lock and loss-of-clock. If you're worried about the PLL having problems, monitor "PLL_SR". The bits in there tell you if the PLL is locked, or has lost lock in the past.

Tom

 

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Linghuafang
Contributor I

>So when did you read it as 0x18 and then when did you read it as 0x08 because the power went off and on between those two reads.

0x18 is read through the first C language after the board is powered on; 0x08 is read after the operating system is started; The program did not restart between those two reads, Is it possible to lose power?

we use Oscillator to provide the clock.

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

Sorry for the later reply.

Please refer MCF54418 reference manual chapter 12.4.2.1 Non-SBF Reset Sequence about chip reset detailed process.

Thereafter the global resets and RSTOUT are de-asserted and the system is brought out of reset. Customer can check RSTOUT pin to check if the chip run out of reset.

The reason why PLL lost of lock happens during POR, the Clock source could exist not stable (jitter) status during power on reset.  customer could check the MCF54418 datasheet about chapter 2.2.1 Power-up sequence.  

Thanks for the attention.

B.R.

Mike

 

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