MCF54416 PLL does not lock

[klausimmig]

We are trying to boot our custom board (MCF54416) with the following options:

50 MHz external Reference, oscillator bypass, pll on, pll=10x fref.

First we try to boot with bootmode=01: RCON override with 0x2F but ~RSTOUT remains low.

We can see the FB_CLK running at 62.5MHz as expected.

The we try the same configuration with bootmode=11: override value for RCON = 0xA709FC61

We also try lower bus clock for fsys and fsys/2.

But the result is similar to the first attempt.

The only way to get the board into the "run" state:

1. Power on reset with bootmode=11 (serial boot) without any serial device attached

            (this puts the oscillator in bypass mode)

2. Trigger the external reset

            ( change reset cause from "POR" to "external reset")

3. Changing the bootmode on the fly to "01" after ~RESET is deasserted

            (load all other RCON bit except oscillator mode)

After that the ~RSTOUT is released and the board can be accessed.

We have build several boards with the coldfire V2 so far.

So we carefuly check power supplies, clock reference and power up sequence.

All parameter seem to meet the requirements.

Are there any issues known which can cause such a behavior?

After some further testing we added a FRAM for serial boot.

Writing a configuration with oscillator bypass and PLL enabled result in an unlock state. The only way

to get it work is to start in LIMP mode. After ~RSTOUT is deasserted clock divider and PLL mode were set via software.

Before we could leave limp mode we have to add a small delay (1ms). After that a lock is achieved after the documented time elapsed (< 50ms).

Any suggestions?

[TomE]

Search in this forum for "mcf5331x pll" and "mcf5441x clock". This one might be (remotely) relevant:

https://community.nxp.com/message/108770?commentID=108770#comment-108770

There are two versions of Reference Manual that you should have for this CPU. There's V3 and V4. V4 has some "damage" in some of the chapters that was never fixed, and you need to refer to the V3 manual. That isn't available from Freescale/NXP, but it is here:

https://community.nxp.com/message/307125?commentID=307125#comment-307125

I assume you've checked the Errata. There doesn't seem to be anything matching in there.

As to "how do you start this chip", you should try and treat it the same way the Reference Designs do. I doubt if you have a Development Board for this chip unless you got it a long time ago - why are you starting a project with a chip (and system) this old? You should also try to get the boot code the Reference Boards (or any other board using this chip) use to see how they start it up. I think your safest option is "limp then enable PLL" or "PLL Bypass, then limp, then enable bypass and wait" or some combination like that.

Tom

[klausimmig]

Dear Tom,
Finally, I would like to tell you about the solution to our problem.
As reported we want to start in oscillator bypass mode. In chapter 8.1.3.2 of the Reference Manual it is said that an internal pull-up resistor is switched on at pin XTAL.
Chapter 2.3.2 says, however, that an external resistor at pin XTAL is necessary to switch on the bypass mode. Adding a resistor to pin XTAL has fixed the problem.
The device now starts as expected.

Yours sincerely
Klaus