We are using MCF54415 with BDM mode.
The mcf54415 boot from a 4M_8bits_NorFlash.
I have modified the *.lcf to make almost all .code segment ,.data segment and .bss segment in ROM mode as the same as in RAM mode.
In ROM mode , the board can startup OK, copy all codes / data to the right address and clear the .bss segment.
Now all my codes are running OK in RAM mode, but when in ROM mode , the board failed.
In ROM mode, a task of CAN communication timed out. In RAM mode , use the same codes, the CAN task will not time out.
I want to know why the same code running different results in RAM and ROM mode.
Original Attachment has been moved to: RAM_ROM_xMAP.rar
Do you interface the NOR flash with the Flexbus? The booting process from FlexBus should be automatic depending on the BOOTMOD[1:0] pins. When they are 0:0, it boots from flexbus with default configuration, but with this configuration, the port size is 8bit. Therefore you need to configure the BOOTMOD[1:0] = 01. And use the FB:AD[7:0] pins to configure the boot configurations.