Internally, the MCF5271 has a 32-bit address bus, so in theory it could address 4GB of memory. Not all of the address bus lines are brought out to external pins, so you might think that this limited the memory space.
However, when interfacing to SDRAM memory, the address bus is multiplexed - i.e. the logical address is broken down into two parts called a 'row' address and a 'column' address.
To access a value in SDRAM memory, the SDRAM controller first places the row' address on the address bus, and the SDRAM memory stores this. The SDRAM controller then sends the 'column' address, and the data transfer takes place.
(For subsequent memory accesses with the same row address, the SDRAM controller can just change the column address, making for a faster access).
In practical terms, this means that a logical address is broken down into two parts, so the number of external pins is not a limiting factor.
