What CPU are you using?
The answer to your problem is that you have to use external logic to generate the TA.
In the simplest case (assuming the LCD controller can generate the Wait in zero nanoseconds, which it can't), you just feed the CS back to TA through a gate which blocks the TA if the LCD controller drives its WAIT signal. For this to work, the TA has to be blocked PRIOR to the setup time on the next Flexbus clock. If your chip is fast enough and your Flexbus clock is slow enough, this might work. Otherwise it might work sometimes. You have to check all the timings and all the delays of the clock-to-CS, setup of TA-to-clock, delay of CS-to-Wait and the delays in the gates you're using.
The proper design generates a delayed version of the chip select (delay with some flip-flops clocked from FB_CLK) and feeds that back as the TA signal, blocked by the WAIT signal from your lcd controller.
Have you considered the MCF5329 with its inbuilt LCD controller?
****
Looking at the Product Brief, it says on the first page:
" The S1D13A05 utilizes a guaranteed low-latency CPU architecture that provides support for microprocessors without READY/WAIT# handshake signals".
It claims "'Fixed' low-latency CPU access times" and "Direct support for Motorola MC68xxx (REDCAP2, Dragonball, ColdFire)", so I don't see why you're worrying about the WAiT signals. Maybe you've got it in the wrong mode?
It has SEVEN configuration pins that allow selection of NINE different bus modes, together with WAIT polarity selection. The Reference Manual shows direct connection to different busses, including Motorola ones that require DTACK. You should be able to connect it up without any logic if you select the right mode (MC68k #1 or #2).
Interesting. There's a "no DTACK" mode, but 2D BitBLT isn't supported if you use it.
Tom