High speed serial input for MCF52235

[PsychoDebugger]

I have to manage the signal as shown in figure.
Tclk=3 Mhz (input clock for micro)
Tsync=1 khz (input for micro, start of transfer)
Tdata (input for micro, data packet)
Msync (don't care)





I have to acquire data from Tdata.
I have to start acquiring each Tsync rising and to stop acquiring each Tsync falling.
Tdata is 32 bit long and it is synchronous with the Tclk clock.

I thought about the QSPI, but it read that it can be only a master and
It can not take any clock signal in input as I need.

Any suggest on how to do it?
Also other peripheral.

[admin]

You could try a clever trick:
1) Configure a DMA timer to trigger a DMA transfer on transition on DTIN. Tie DTIN to Tsync.
2) Use the DMA transfer to start a QSPI transfer by writing to one of its control registers.
3) Use the QSPI transfer to capture the data (tie QSPI_DIN to Tdata). If complete synchronization is difficult, you might want to oversample.
4) Analyze data received by QSPI.
It might just work.

[mjbcswitzerland]

Hi Psycho

Assuming I have understood the following correctly:
1. 32Bit work (about 10us) transfer time
2. Repeated once a ms
You may be able to do it with a DMA timer.

- Connect the input lines which interest you to one (single) M52235 port.
- Choose one as trigger (this is the most critical bit)
When the trigger occurs, start the DMA timer, set up to do a port sample every Xns (by DMA to RAM). Possibly it will not be possible to synchronise to the clock but over sampling is possible.
After the programmed number of timer samples has expired (the DMA transfer has completed and the samples are ready in RAM) the end of DMA transfer interrupt can trigger the analysis of
the input samples and extraction on the data word.
Since you have almost 1ms for the analysis this shouldn't be a big issue. The DMA samples ensure high sampling accuracy and no CPU intervention during the 10us sampling period.

The biggest problem is synchronising the start - possibly Msync could come in handy to trigger a high priority interrupt (NMI) to set the DMA timer start. I don't think that this start can be
triggered by hardware, but maybe there is a trick.

We have used this technique (a bit like a logic analyser sampling up to 8 bits on one port) to do something similar - but it was not so fast, so the trigger synchronisation was easy.

Regards

Mark

www.uTasker.com



Message Edited by mjbcswitzerland on 2008-06-24 09:37 PM