> To see the Coldfire Support Runtime library code use
> DIR /S C:\LongLongCF.C
On your computer, not mine. I don't have any copies of CW. Your examples are enough to show it seems to be pretty bad.
> I have not seen the gcc library so I don't know if it would be better to use.
Why not follow the link I sent you, download it and have a look?
> The LongLongCF.C CINT64 multiply routine
Gcc doesn't seem to need such foolishness.
Here's an example of a constant multiply performed as a multi-bit shift, something you've previously said CW doesn't seem to do.
avPtr->accum = avPtr->raw * FILT_LEN;
avPtr->avrg = avPtr->raw;
2012 movel %a2@,%d0
2200 movel %d0,%d1
eb89 lsll #5,%d1
2680 movel %d0,%a3@
2881 movel %d1,%a4@
Here's a Multiply performed as an in-line (five CPU clock) multiply:
size_t A2uMemFwrite(const void * buf, size_t size, size_t items,
FILE_STRUCT *filehandle __attribute__ ((unused)))
{
401075de: 2f03 movel %d3,%sp@-
401075e0: 262e 0010 movel %fp@(16),%d3
401075e4: 2f02 movel %d2,%sp@-
int32_t nLength = size * items;
401075e6: 242e 000c movel %fp@(12),%d2
401075ea: 4c03 2800 mulsl %d3,%d2
Here's a bunch of Divides being performed by in-line REMSL instructions in 35 CPU clocks.
rx.chan32[x] = val32/scale;
401080b2: 2a02 movel %d2,%d5
401080b4: 4c41 5805 remsl %d1,%d5,%d5
401080b8: 2585 9c00 movel %d5,%a2@(00000000,%a1:l:4)
r16.chan[x] = (int)((mod16)?(val16/scale)%mod16:val16/scale);
401080bc: 4a83 tstl %d3
401080be: 6710 beqs 401080d0 401080c0: 2004 movel %d4,%d0
401080c2: 4c41 0800 remsl %d1,%d0,%d0
401080c6: 2200 movel %d0,%d1
401080c8: 4c43 1805 remsl %d3,%d5,%d1
401080cc: 2005 movel %d5,%d0
401080ce: 6006 bras 401080d6 401080d0: 2004 movel %d4,%d0
401080d2: 4c41 0800 remsl %d1,%d0,%d0
401080d6: 41f9 4027 d6c0 lea 4027d6c0 ,%a0
401080dc: 3200 movew %d0,%d1
401080de: 2009 movel %a1,%d0
401080e0: 0680 0000 0058 addil #88,%d0
401080e6: 3181 0a00 movew %d1,%a0@(00000000,%d0:l:2)
You're running the MCF51JM128 which supports the ISA_C instruction set. This is a superset of ISA_A which supports DIV and REM, except for the note in the manual that mentions "6.3.3.11 Unsupported Instruction Exception: For this device, attempted execution of valid integer divide opcodes and all MAC and EMAC instructions result in the unsupported instruction exception". Ouch! This subject has come up a few times here before, but your CW is configured properly and is calling software routines. You should still try to replace divides with multiplies (as I think you're doing).
Re: DIVU/DIVS Forcing a Reset
Re: Unsupported instruction Exception on AC256 with DIVS
> AND was using SVN for version control
Bad workman who can't use the tools properly. SVN is meant to be used with BRANCHES for separate threads of code development, separate projects, separate releases. I hope you made good use of the "Blame" facility, it seems appropriately named in your case.
> get the company to go with the Kinetics but the new designer has been against it.
Unless Freescale has written their own version of the ARM documentation I'd avoid it too. If you're now extremely familiar with the ARM chip, it is very difficult to find out anything about the specific chip you're using. If you thought the PPC documentation was a sprawling minefield, the ARM is even more so. I'm sure all the information is all there - somewhere, it is just never in the document you've just downloaded, but somewhere else.
Tom