Hello
I am trying the work with the receive interrupt of the uart.
I succeeded to get an interrupt when sending data(byte) to the CF52235.
When i read the URBn register i get fault data.
my initialization of the Uart regs are:
Code:
#define UART_INT_LEVEL(x) ((byte)(x<<3)) #define UART_INT_PR_LEVEL(x) (x)MCF_UART0_UCR=0x10;//Reset Reciver And TransmitterMCF_UART0_UIMR=0x2;//Interrupt when Receive Is ReadyMCF_GPIO_PUAPAR=0x55;//Set To Primary Function (To Uart)/* UART 0 Mode Registers */MCF_UART0_UMR = 0x13;//No Parity ,8 Bits (UMR10)//UMR20 -->After UMR10 It Poits To UMR20MCF_UART0_UMR = 0x7;//1 Stop Bit Normal Mode (UMR20) Must Be After UMR10MCF_UART0_UCSR=0xDD;//Clock Source (f(sys)/2)//19200 Baud Rate--> Divider =~49MCF_UART0_UBG1=0x0;//MSB DividerMCF_UART0_UBG2=0x28;//LSB DividerMCF_UART0_UCR=0x5;//Enable Transmit&Receive//Enable Interrupt Of Uart (Not The MaskAll)MCF_INTC0_IMRL&=ENABLE_UART1_INT;MCF_INTC0_ICR13=UART_INT_LEVEL(6)|UART_INT_PR_LEVEL(2);
I read the data from the MCF_UART0_URB register ( (*(vuint8 *)(&__IPSBAR[0x00020C])) )
Why is that?
I also did't understand how the fifo works. How i read the fifo data ? what is the fifo address (i know the URB reg)?
Thanks
Alban formatted code & gave meaningful title
Message Edited by Alban on 2006-08-07 09:55 AM
Thanks for the help
The problem was wrong CPU bus frequency.