5213 DTIM3 - Having issues with creating/Start interrupt

[geoffrey]

Hello !  I have been working a project that requires and isr for dtim3.  I'm trying to setup an interrput for dtim3. I have added my isr to vector 22 in the vector.s file. Here's the code :

 
    MCF_INTC_ICR22 |= MCF_INTC_ICR_IL(3) | MCF_INTC_ICR_IP(3);
    MCF_DTIM3_DTRR = ( SYS_CLK_KHZ / PRESCALER / TIMER_RATE ) - 1;
    MCF_DTIM3_DTMR = ( (uint16) ( PRESCALER - 1 ) << 8 ) + 0x001b;
    MCF_INTC_IMRH = 0xfff7fffe;

I'm lost on this. Code someone please look at this and tell me what I'm doing wrong.

Thanks

Geoffrey

:

[mjbcswitzerland]

Hi

Here is a small extract of code to do a single shot hardware timer delay in ms. It originates from the uTasker project. It is used in its normal context (this is a snippet from it) to control multiple global hardware timers [the DMA timers in the Coldfire are in fact very good and enable single delays of up to about 17min with us resolution]. They are also used for the in-built uNetwork protocol which allows distributed processing in a LAN based network - a fast network protocol is implemented with the hardware timer managing retransmissions after a few ms in case of message loss.

You may see something which you need to solve your problem.

Regards

Mark Butcher
www.uTasker.com

Note the define for INTERRUPT_LEVEL_4 is 0x04 shifted by three to the left - the shift left sign got lost when posting!

#define DTIM3_VECTOR        0x56
#define INTERRUPT_LEVEL_4   (0x04  3)
#define INTERRUPT_PRIORITY_1 0x1
#define DTIM3_PIF_INT_L     0x00400000
#define MASK_ALL_INT        0x00000001
#define BUS_CLOCK           (60000000)
#define DMA_TIM_EVENT_CAP   0x0001
#define DMA_TIM_EVENT_REF   0x0002
#define BUS_CLOCK_16        0x0004
#define DMA_TIM_RESTART     0x0008
#define ORRI                0x0010
#define ENABLE_DMA_TIMER    0x0001

static __interrupt__ void _hwtimer_interrupt(void)
{
  DTRR3 = 0;                      // clear reference to indicate not in use
  DTER0 = DMA_TIM_EVENT_REF;      // reset interrupt request flag
  // Do stuff here
  // ..
}


// Start a single short hardware timer for a delay in ms units
//
externt void fnStartDelay(unsigned long ulMilliSeconds)
{
    __VECTOR_RAM[DTIM3_VECTOR] = (unsigned long)_hwtimer_interrupt;  // enter the interrupt routine
    IC_ICR_0_22 = (INTERRUPT_LEVEL_4 | INTERRUPT_PRIORITY_1);        // define interrupts level and priority
    IC_IMRL_0 &= ~(DTIM3_PIF_INT_L | MASK_ALL_INT);                  // unmask interrupt source

    DTRR3 = (ulMilliSeconds * ((BUS_CLOCK / 16 / 1000));             // set ms unit compare rate (max about 19 minutes)
    DTER3 = (DMA_TIM_EVENT_CAP | DMA_TIM_EVENT_REF);                 // Clear possible events

    DTMR3 = (BUS_CLOCK_16 | DMA_TIM_RESTART | ORRI | ENABLE_DMA_TIMER); // Bus clock / 16, enable interrupt and enable timer (again)
}

Message Edited by mjbcswitzerland on 2007-01-2512:50 PM

[SimonMarsden_de]

You could try taking a look at an application called ColdFire Init (or CFInit). It's a GUI application which runs on Windows. It allows you to configure a processor graphically and then writes the C code for you.

For the M5213EVB, CFInit even includes the ability to generate a sample interrupt handler for the DMA timer, and can generate a CodeWarrior project for you.

The URL is:

http://www.microapl.co.uk/CFInit/cfinit_main.html

Hope this helps

[geoffrey]

Thanks for the information( good catch! ), but I still cannot get my interrupt dtim3 to kick.  I'm doing asm(move.w #0x2000,SR) in main before I call timer_init.  I have in my vector.s file :

#define __tmrISR  _tmrISR

.extern _tmrISR

vector022:  .long   _tmrISR

Code :

 MCF_INTC_ICR22 |= MCF_INTC_ICR_IL(6) | MCF_INTC_ICR_IP(3);
 
 MCF_DTIM3_DTRR = ( SYS_CLK_KHZ / PRESCALER / TIMER_RATE ) - 1;
 MCF_DTIM3_DTMR = ( (uint16) ( PRESCALER - 1 ) << 8 ) + 0x001b;
 
 MCF_INTC_IMRH = 0xffffffff;
 MCF_INTC_IMRL = 0xffbffffe;

Do you have any thoughts on this ?

Geoffrey

[SimonMarsden_de]

One thing that looks wrong is the interrupt mask in IMRH/IMRL.

The DMA Timer 3 interrupt is number 22, so you need to clear bit 22 in IMRL (together with bit 0, the Mask-All bit). This would mean:

IMRH = 0xffffffff;
IMRL = 0xffbffffe;

You also need to make sure that the processor's main Status Register (SR) doesn't mask out interrupts.

Hope this helps


Simon