In MCF54455RM datasheet I have found the following information:
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"When multiple interrupt requests are programmed to the same level number, they are processed in a descending request number order. As an example, if requests 63, 62, 2, and 1 are programmed to a common level, request 63 is processed first, then request 62, then request 2, and finally request 1."
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Therefore please for more details go to the chapter "16.2.9Interrupt Control Register (ICR0n, ICR1n, (n = 00, 01, 02, ..., 63))" in the datasheet.
Unfortunately the representation of "Interrupt priority" property in Processor Expert does not exactly refer to the datasheet in this case, because the MCF54452 does not support priority within a level. As workaround please ignore the text "priority within level 0" in the "Interrupt priority" property.
best regards
Vojtech Filip
Processor Expert Support Team
UNIS