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nvm sample code

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CustomSarge
Contributor III

Maybe it's age, but I'm finding the PA4 section on using NVM really confusing.

Anybody got an assembler snippet of erasing & writing then reading 2 bytes from the EEPROM area?

If I become the first, I'll post it.

I've got 12 bytes to save in this project, and EEPROM looks like it's meant for that.

I get the index register part, it's the real addressing of $3100 into a 24 bit "global" address that I don't.

TNX K.Sargent

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CustomSarge
Contributor III

Ok, thanks, but I'm totally ignorant on C projects in CW.

I write pure assembler and there doesn't seem to be an extension "xx.mcp" for the C project you attached.

As versed with trying to teach me something I won't use, may I please beg your indulgence to attach the disassembly as text?

Thanks, Kevin Sargent

It's 6/23 and I still can't figure out how to open the example, let alone compile & disassemble it.

Am I the only assembler writer that can't decipher the nvm register descriptions enough to use them? (Very frustrating)

I've been deciphering good -> obtuse module register descriptions since Z80 & 68000 peripheral chips (back before uP->uC).

Even a decent overview of nvm archetecture would help a lot (not the flow chart).  TNX <<<)))

It's 6/29 and I'm yet to be convinced this isn't the worst written module behavior description yet.

Parts of AN4570 claim that b7 of the "global address" have to be 1 to hit EEPROM.

Yet there's Nothing in the reference manual to corroborate this.

All the code snips are written in C code, using library functions.

Who In HELL thinks this is an acceptable tutorial of the modules' behavior??

I'm begining to think nobody can properly code it at assembler level, because they CAN'T.

Sorry, but I've "decoded" bad datasheets before, this is a new low, Very Frustrated.

That this falls prey to the same dearth of response, means I stop any forum use and go upscale...

Now 6/30. I found app note AN4347 gives unambiguous examples of direct register values required to erase, write, etc.

Interesting quirks popped up, but I have worked around them.

AN4347 should have a tag for queries on NVM & flash.

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Carlos_Mendoza
NXP Employee
NXP Employee

Hi Kevin,

Please take a look to the following application note that explains how to use this module:

http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4570.pdf

Attached is a S08PT60 flash demo for your reference, the flash/eeprom management method is the same for all 9S08P family. You can use the "Disassemble" option in CodeWarrior to view the generated assembly instructions.

Hope it helps!

Best Regards,

Carlos Mendoza

Technical Support Engineer

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Note: If this post answers your question, please click the Correct Answer button. Thank you!

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647 Views
CustomSarge
Contributor III

Ok, thanks, but I'm totally ignorant on C projects in CW.

I write pure assembler and there doesn't seem to be an extension "xx.mcp" for the C project you attached.

As versed with trying to teach me something I won't use, may I please beg your indulgence to attach the disassembly as text?

Thanks, Kevin Sargent

It's 6/23 and I still can't figure out how to open the example, let alone compile & disassemble it.

Am I the only assembler writer that can't decipher the nvm register descriptions enough to use them? (Very frustrating)

I've been deciphering good -> obtuse module register descriptions since Z80 & 68000 peripheral chips (back before uP->uC).

Even a decent overview of nvm archetecture would help a lot (not the flow chart).  TNX <<<)))

It's 6/29 and I'm yet to be convinced this isn't the worst written module behavior description yet.

Parts of AN4570 claim that b7 of the "global address" have to be 1 to hit EEPROM.

Yet there's Nothing in the reference manual to corroborate this.

All the code snips are written in C code, using library functions.

Who In HELL thinks this is an acceptable tutorial of the modules' behavior??

I'm begining to think nobody can properly code it at assembler level, because they CAN'T.

Sorry, but I've "decoded" bad datasheets before, this is a new low, Very Frustrated.

That this falls prey to the same dearth of response, means I stop any forum use and go upscale...

Now 6/30. I found app note AN4347 gives unambiguous examples of direct register values required to erase, write, etc.

Interesting quirks popped up, but I have worked around them.

AN4347 should have a tag for queries on NVM & flash.