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multiple interrupts

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juliancox
Contributor V

I am using a S08QE8 and need 2 external interrupts (PA0 and PA5/RESET)

My first problem is that ProcessorExpert will only allow me to set the triggers as falling edge or low level, although I cannot find anything about this limitation in the users manual.

Secondly - There is a very high likelyhood that both triggers will occur simultaneously, otherwise only one trigger may occur (either one). However, there is only one interrupt flag, which must be cleared ready for the next event,  and one interrupt vector. This creates something of a problem. Does anyone have any bright ideas?

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vicentegomez
NXP TechSupport
NXP TechSupport

Hi

Sorry I am still confused 

 

the PTA0 does not have IRQ function, it has KBI

The PTA5 has IRQ, but it does not have KBI

please check the attached 

vicentegomez_0-1605481167108.png

Then if I am understanding properly you can set the IRQ on the PTA5 with the vector interrupt 2

vicentegomez_1-1605481362385.png

and you can set the KBI on the PTA0 that has the vector interrupt 18

vicentegomez_2-1605481458101.png

With this you will have 2 vector interrupts, 2 status and control register.

The KBI has a higher priority.

Regards

 

 

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juliancox
Contributor V

No. As I said in my post - I am using two external interrupts, not KBI. PTA5 is the reset line and can only be used as an external interrupt.

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vicentegomez
NXP TechSupport
NXP TechSupport

 

You mean use the IRQ on the reset pin(PTA5)?

 

What vector interrupt do you want to use?

 

I got confused 

Regards

 

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juliancox
Contributor V

I think you have missed the point. Allow me to explain again.

I have two external signals and I want them each to generate an IRQ independent of the other, each with its own interrupt vector and its own status and control register. I first use PA5 as an IRQ and it works fine. I then use PA0 as an IRQ and that also works fine.

BUT if I use them both one of them will be acknowledged, The ISR will be executed and the interrupt flag is cleared. if both interrupts occur simultaneously one will be acknowledged and, because the IRQ flag has been cleared, the other IRQ will be missed.

Can I create a new Codewarrior component and allocate an interrupt vector of my choice?

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vicentegomez
NXP TechSupport
NXP TechSupport

Hi

Sorry I am still confused 

 

the PTA0 does not have IRQ function, it has KBI

The PTA5 has IRQ, but it does not have KBI

please check the attached 

vicentegomez_0-1605481167108.png

Then if I am understanding properly you can set the IRQ on the PTA5 with the vector interrupt 2

vicentegomez_1-1605481362385.png

and you can set the KBI on the PTA0 that has the vector interrupt 18

vicentegomez_2-1605481458101.png

With this you will have 2 vector interrupts, 2 status and control register.

The KBI has a higher priority.

Regards

 

 

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vicentegomez
NXP TechSupport
NXP TechSupport

Hi

 

Are you using KBI? the PTA5 does not have KBI 

the PTA5 has the IRQ that is a different interrupt

Please confirm

regards

 

 

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