firmware porting

[Aili]

Hi, I am working on porting 56F807 firmware to 56F8367 based on Application Note AN2095. However, I am not able to compile the assembly code written in 56F800 format using CodeWarrior 8.3se. Is there any setting required to make the compiler work with old format?

I have seen the code created by Processor Expert for 56F8346 as shown below which has the option of using 56F800 format (CW V2 compiler is used to implement these functions for V1 compatibility). However, if I am not able to compile it successfully if changing "#if 0" to "#if 1". Any suggestions will be appreciated!

/*****************************************************************************/
/* Primitives (impyuu, impysu) added to circumvent CW problems */

#if 0
// CW V2 compiler is used to implement these functions for V1 compatibility

#undef add

asm unsigned long impyuu(unsigned short unsigA, unsigned short unsigB)
{  /* y0 = unsigA, y1 = unsigB */
  push  OMR      /* store the status of the OMR register */
  bfclr #0x10,OMR    /* set saturation OFF (SA = 0) */
  bfset #0x0100,OMR   /* set Condition Code bit (CC) bit to 1 */
  move  y0,x0      /* save y0 (unsigA) to x0 */
  andc  #0x7fff,y0    /* mask the sign position - represent the positive sign number */
  mpysu y0,y1,a    /* multiply signed operand (y0) and unsigned operand (unsigB = y1)*/
  tstw  x0        /* test if MSB is 0 or 1 (set N flag in SR reg) */
  bge   OVER      /* jump accordig to N flag - if 1 pass, if 0 jump */
  movei #0x7fff,x0  /* store maximum positive value to x0 */
  macsu x0,y1,a    /* multiply 0x7fff with unsigB and accumulate with the previous product */
  clr   b        /* clear B register, used as a temporary location */
  move  y1,b0      /* move unsigB to the LSP of B */
  add   b,a        /* correct the result, needed two times because of fractional multiplication */
  add   b,a       /*  --||-- */
  OVER:
    asr   a               /* fractional into integer number conversion */
  bge   OVERFLOW        /* branch according to V flag - if 1 jump, if 0 pass */
  bfclr #0x8000,a1    /* correction of the sign position - clear MSB bit in A */
  OVERFLOW:
  pop   OMR             /* restore original contents of OMR */
    rts
}

/* asm Int32 impysu(Int16 sig, UInt16 unsig) */
asm long impysu(short sig, unsigned short unsig)
{
  mpysu y0,y1,a
  asr a
  rts
}

#define add             __add

#else

unsigned long impyuu(unsigned short unsigA, unsigned short unsigB)
{
  return (unsigned long)unsigA * unsigB;
}

long impysu(short sig, unsigned short unsig)
{
  return (long)sig * unsig;
}

#endif

Thanks,

Liping

[Aili]

Has anyone tried  Application Note AN2095 before? Thanks.

[xiangjun_rong]

Hi, LiPing,

As you know that some of DSP56800E core registers are not 16 bits width as that of DSP56800 core registers, you have to specify the data width in the assembly code based on your requirement. The AN2095 just give you tips when you port.

I help you modify the above code, it can pass the compilation. You have to change your code, because there is not such instruction as move xxxx,xxxx, you have to specify the data width when you use move instruction.

Pls read the DSP56800EFM.pdf before you  modify the code.

Hope it can help you.

BR

Xiangjun Rong

#if 1
// CW V2 compiler is used to implement these functions for V1 compatibility

//#undef add

asm unsigned long impyuu(unsigned short unsigA, unsigned short unsigB)
{  /* y0 = unsigA, y1 = unsigB */
  //push  OMR      /* store the status of the OMR register */
    ADDA #2,SP ; //Point to first empty location
    MOVE.w OMR,X:(SP)+ ; //Save extension register
    
  bfclr #0x10,OMR    /* set saturation OFF (SA = 0) */
  bfset #0x0100,OMR   /* set Condition Code bit (CC) bit to 1 */
  move.w  y0,x0      /* save y0 (unsigA) to x0 */
  andc  #0x7fff,y0    /* mask the sign position - represent the positive sign number */
  mpysu y0,y1,a    /* multiply signed operand (y0) and unsigned operand (unsigB = y1)*/
  tstw  x0        /* test if MSB is 0 or 1 (set N flag in SR reg) */
  bge   OVER      /* jump accordig to N flag - if 1 pass, if 0 jump */
  move.w #0x7fff,x0  /* store maximum positive value to x0 */
  macsu x0,y1,a    /* multiply 0x7fff with unsigB and accumulate with the previous product */
  clr   b        /* clear B register, used as a temporary location */
  move.w  y1,b0      /* move unsigB to the LSP of B */
  add   b,a        /* correct the result, needed two times because of fractional multiplication */
  add   b,a       /*  --||-- */
  OVER:
    asr   a               /* fractional into integer number conversion */
  bge   OVERFLOW        /* branch according to V flag - if 1 jump, if 0 pass */
  bfclr #0x8000,a1    /* correction of the sign position - clear MSB bit in A */
  OVERFLOW:
  //pop   OMR             /* restore original contents of OMR */
    MOVE.w OMR,X:(SP)+ ; //Save extension register
    rts
}

/* asm Int32 impysu(Int16 sig, UInt16 unsig) */
asm long impysu(short sig, unsigned short unsig)
{
  mpysu y0,y1,a
  asr a
  rts
}

#define add             __add

#else

unsigned long impyuu(unsigned short unsigA, unsigned short unsigB)
{
  return (unsigned long)unsigA * unsigB;
}

long impysu(short sig, unsigned short unsig)
{
  return (long)sig * unsig;
}

#endif