System clock

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System clock

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kayji
Contributor I

Hello. i'd like to ask something about system clock in the board MC9S12XEP100.

 

In the Manuel, this board has clock sources to support frequency to system. Things like Oscillator, Phased locked loop.

 

The problem is oscillator in this board only can provide not more than 4MHZ clock though i need a 16Mhz system clock.

 

As i've seen a Manuel, Phased lock loop mode can solve my problem. But i don't understand exactly what that mode is. Is that

 

a mode providing internal system clock source? 

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kef
Specialist I

PLL allows you to multiply and divide your reference oscilator clock (4MHz in your case) to produce higher clocks. I'm not sure what do you mean by system clock. If it is a bus clock, then S12XE code to switch to 16MHz bus clock from 4MHz osc. clock could be like this:

 

   SYNR = 3;
   REFDV = 0x40;
   POSTDIV = 0;
   PLLCTL |= PLLCTL_PLLON_MASK;

   while( !(CRGFLG & CRGFLG_LOCK_MASK) )
   {           /* Wait until PLL lock */
   }
  CLKSEL |= CLKSEL_PLLSEL_MASK; // switch to PLL clock
 

If you need different bus clock, then use this software to calculate SYNR, REFDV and POSTDIV settings:

http://cache.freescale.com/files/microcontrollers/doc/user_guide/S12XEIPLLCUGSW.zip

 

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131 Views
kef
Specialist I

PLL allows you to multiply and divide your reference oscilator clock (4MHz in your case) to produce higher clocks. I'm not sure what do you mean by system clock. If it is a bus clock, then S12XE code to switch to 16MHz bus clock from 4MHz osc. clock could be like this:

 

   SYNR = 3;
   REFDV = 0x40;
   POSTDIV = 0;
   PLLCTL |= PLLCTL_PLLON_MASK;

   while( !(CRGFLG & CRGFLG_LOCK_MASK) )
   {           /* Wait until PLL lock */
   }
  CLKSEL |= CLKSEL_PLLSEL_MASK; // switch to PLL clock
 

If you need different bus clock, then use this software to calculate SYNR, REFDV and POSTDIV settings:

http://cache.freescale.com/files/microcontrollers/doc/user_guide/S12XEIPLLCUGSW.zip

 

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