SWI and SYS interrupts configuration in processor export

[rajesh057]

I have generated SWI and SYS interrupts using processor export

->In modules ->vector table ->Vsys,Vswi configured and code generated .while building code its saying functions undefined in Vswi.c file contain definition but its commented ..is their any problem to create Vswi,Vsys.

if no can pls help me to crate interrupts and code generation

Thanks

Rajesh

[Carlos_Mendoza]

Hi Rajesh,

Could you tell us which MCU are you using?

Thanks in advance!

Best Regards,
Carlos Mendoza
Technical Support EngineerRajesh

[rajesh057]

Hi Carlos,

I am using MC9S12ZVC192 MICRICONTOLLER and code warrior tool .

Thanks,

Rajesh Kota

[rajesh057]

Hi Carlos,

Hi can I get what and all cover under SYS interrupt and SWI interrupt ..any special document on sys and swi apart data sheet and Instruction set.

Thanks ,

Rajesh Kota

[ZhangJennie]

Hi Rajesh,

You can enable these two interrupts  in CPU properties. then generate pe code, you will see the related vector and  interrupt function generated. See attached video.

Have a great day,
Jennie Zhang

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[rajesh057]

Hi pls find the above pics I can able create interrupts from components ...but ur suggestion in cpu component inspector is it both are same .

S12zvc have any core self test functionality check .on of the document saying having SCST module for S12ZVC.

Thanks ,

Rajesh Kota

[ZhangJennie]

Hi Rajesh,

I believe your last two screenshots are generated by component InterruptVector. Something like Vsys.c. Vswi.c

In CW10, these c files from InterruptVector component  are commented. To use the generated functions, we need manually copy them for example

to User modules:

main.c
or

Events.c

These are also suggested under comments.

Have a great day,
Jennie Zhang

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[rajesh057]

Hi Jennie ,

1)My question is Both process of creating interrupts different but result is it same ?

2)Core self test component is avail for S12Zvc if its is yes can you pls give me over view of Self test module .

thanks

Rajesh Kota

[ZhangJennie]

Hi Rajesh Kota

Regarding to your questions:

>>1)My question is Both process of creating interrupts different but result is it same ?

Answer: Correct.

>>2)Core self test component is avail for S12Zvc if its is yes can you pls give me over view of Self test module .

Answer: I don't think we have core self test component.

Have a great day,
Jennie Zhang

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