/* ### Init_MSCAN init code */ /* CANCTL0: INITRQ=1 */ CANCTL0 |= (unsigned char)0x01; while(!CANCTL1_INITAK) { /* Wait for init acknowledge */ } /* CANCTL1: CANE=1,CLKsrc=0,LOOPB=0,LISTEN=0,BORM=0,WUPM=0,SLPAK=0,INITAK=1 */ CANCTL1 = 0x91; CANCTL1_LISTEN = 0; /* CANBTR1: SAMP=0,TSEG22=0,TSEG21=0,TSEG20=0,TSEG13=0,TSEG12=0,TSEG11=0,TSEG10=1 */ CANBTR1 = 0x01; /* CANBTR0: SJW1=0,SJW0=0,BRP5=0,BRP4=0,BRP3=0,BRP2=0,BRP1=0,BRP0=1 */ CANBTR0 = 0x01; /* CANIDAC: IDAM1=0,IDAM0=1,IDHIT2=0,IDHIT1=0,IDHIT0=0 */ CANIDAC = 0x10; CANIDAC_IDAM0=1; /* CANIDAR0: AC7=0,AC6=0,AC5=0,AC4=0,AC3=0,AC2=0,AC1=0,AC0=0 */ CANIDAR0 = 0x00; /* CANIDAR1: AC7=0,AC6=0,AC5=0,AC4=0,AC3=0,AC2=0,AC1=0,AC0=0 */ CANIDAR1 = 0x00; /* CANIDAR2: AC7=0,AC6=0,AC5=0,AC4=0,AC3=0,AC2=0,AC1=0,AC0=0 */ CANIDAR2 = 0x00; /* CANIDAR3: AC7=0,AC6=0,AC5=0,AC4=0,AC3=0,AC2=0,AC1=0,AC0=0 */ CANIDAR3 = 0x00; /* CANIDAR4: AC7=0,AC6=0,AC5=0,AC4=0,AC3=0,AC2=0,AC1=0,AC0=0 */ CANIDAR4 = 0x00; /* CANIDAR5: AC7=0,AC6=0,AC5=0,AC4=0,AC3=0,AC2=0,AC1=0,AC0=0 */ CANIDAR5 = 0x00; /* CANIDAR6: AC7=0,AC6=0,AC5=0,AC4=0,AC3=0,AC2=0,AC1=0,AC0=0 */ CANIDAR6 = 0x00; /* CANIDAR7: AC7=0,AC6=0,AC5=0,AC4=0,AC3=0,AC2=0,AC1=0,AC0=0 */ CANIDAR7 = 0x00; /* CANIDMR0: AM7=0,AM6=0,AM5=0,AM4=0,AM3=0,AM2=0,AM1=0,AM0=0 */ CANIDMR0 = 0x00; /* CANIDMR1: AM7=0,AM6=0,AM5=0,AM4=0,AM3=0,AM2=0,AM1=0,AM0=0 */ CANIDMR1 = 0x00; /* CANIDMR2: AM7=0,AM6=0,AM5=0,AM4=0,AM3=0,AM2=0,AM1=0,AM0=0 */ CANIDMR2 = 0x00; /* CANIDMR3: AM7=0,AM6=0,AM5=0,AM4=0,AM3=0,AM2=0,AM1=0,AM0=0 */ CANIDMR3 = 0x00; /* CANIDMR4: AM7=0,AM6=0,AM5=0,AM4=0,AM3=0,AM2=0,AM1=0,AM0=0 */ CANIDMR4 = 0x00; /* CANIDMR5: AM7=0,AM6=0,AM5=0,AM4=0,AM3=0,AM2=0,AM1=0,AM0=0 */ CANIDMR5 = 0x00; /* CANIDMR6: AM7=0,AM6=0,AM5=0,AM4=0,AM3=0,AM2=0,AM1=0,AM0=0 */ CANIDMR6 = 0x00; /* CANIDMR7: AM7=0,AM6=0,AM5=0,AM4=0,AM3=0,AM2=0,AM1=0,AM0=0 */ CANIDMR7 = 0x00; /* CANCTL0: INITRQ=0 */ CANCTL0 &= (unsigned char)~0x01; // here's the PROBLEM PROBLEM PROBLEM LINE while(CANCTL1_INITAK) { /* Wait for init exit */ } /* CANCTL0: RXFRM=0,RXACT=0,CSWAI=0,SYNCH=0,TIME=0,WUPE=0,SLPRQ=0,INITRQ=0 */ CANCTL0 = 0x00; /* CANRIER: WUPIE=0,CSCIE=0,RSTATE1=0,RSTATE0=0,TSTATE1=0,TSTATE0=0,OVRIE=0,RXFIE=0 */ CANRIER = 0x00; /* CANTIER: TXEIE2=0,TXEIE1=0,TXEIE0=1 */ CANTIER = 0x01; /* ### */
Solved! Go to Solution.
The solution is, for s08 CAN module to initialise, the MCGERCLK bit in MCGC2 register should be set.
;*********************************************************************;*************************** Config CAN bus **************************;*********************************************************************;*********************************************************************;* SYNC=1 * PROPSEG = 2 * PSEG1 = 6 * PSEG 2 = 7 *;*********************************************************************; <------------- TSEG1 = 8 ------------><-- TSEG2 = 7 -->;<------------------------ Bit Time = 16 x S ------------------------>;********************************************************************* LDA #mCANCTL0_INITRQ STA CANCTL0 ; Mode Init rqstWaitInitMode: LDA CANCTL1 ; Wait for init acknowledge AND #mCANCTL1_INITAK BEQ WaitInitMode LDA #$80 ; STA CANCTL1 ; Enable CAN in normal mode LDA #$67 STA CANBTR1 ; Set sampling point & TSEG fields LDA #$03 STA CANBTR0 ; Set Sync field & Baud rate LDA #$10 STA CANIDAC ; Four 16bits acceptance filter LDA #$FE ;------------------ STA CANIDAR0 ; STA CANIDAR2 ; STA CANIDAR4 ; STA CANIDAR6 ;Set Identifier LDA #$00 ;acceptance register STA CANIDAR1 ; STA CANIDAR3 ; STA CANIDAR5 ; STA CANIDAR7 ;------------------ LDA #$01 ; STA CANIDMR0 ; STA CANIDMR2 ; STA CANIDMR4 ; STA CANIDMR6 ;Set acceptance mask register LDA #$FF ; STA CANIDMR1 ; STA CANIDMR3 ; STA CANIDMR5 ; STA CANIDMR7 ;------------------ CLRA STA CANCTL0 ; enter run modeWaitInitAck: LDA CANCTL1 ; Wait for init acknowledge cleared AND #mCANCTL1_INITAK BNE WaitInitAckWaitSyncCAN: LDA CANCTL0 ; Wait for Synchro CAN AND #mCANCTL0_SYNCH BEQ WaitSyncCAN BRA BCKGND
CANCTL1 = 0x91; CANCTL1_LISTEN = 0;
// ---------------- MCU init ------------------------------------------- /* ### MC9S08DZ60_64 "Cpu" init code ... */ /* PE initialization code after reset */ /* Common initialization of the write once registers */ /* SOPT1: COPT=0,STOPE=0,SCI2PS=0,IICPS=0 */ SOPT1 = 0x00; /* SOPT2: COPCLKS=0,COPW=0,ADHTS=0,MCSEL=0 */ SOPT2 = 0x00; /* SPMSC1: LVWF=0,LVWACK=0,LVWIE=0,LVDRE=1,LVDSE=1,LVDE=1,BGBE=0 */ SPMSC1 = 0x1C; /* SPMSC2: LVDV=0,LVWV=0,PPDF=0,PPDACK=0,PPDC=0 */ SPMSC2 = 0x00; /* System clock initialization */ MCGTRM = *(unsigned char*far)0xFFAF; /* Initialize MCGTRM register from a non volatile memory */ MCGSC = *(unsigned char*far)0xFFAE; /* Initialize MCGSC register from a non volatile memory */ /* MCGC2: BDIV=1,RANGE=1,HGO=0,LP=0,EREFS=0,ERCLKEN=1,EREFSTEN=0 */ MCGC2 = 0x62; /* Set MCGC2 register */ /* MCGC1: CLKS=0,RDIV=0,IREFS=1,IRCLKEN=0,IREFSTEN=0 */ MCGC1 = 0x04; /* Set MCGC1 register */ /* MCGC3: LOLIE=0,PLLS=0,CME=0,VDIV=1 */ MCGC3 = 0x01; /* Set MCGC3 register */ while(!MCGSC_LOCK) { /* Wait until FLL is locked */ } /* Common initialization of the CPU registers */ /* PTASE: PTASE7=1,PTASE6=1,PTASE5=1,PTASE4=1,PTASE3=1,PTASE2=1,PTASE1=1,PTASE0=1 */ PTASE = 0xFF; /* PTBSE: PTBSE7=1,PTBSE6=1,PTBSE5=1,PTBSE4=1,PTBSE3=1,PTBSE2=1,PTBSE1=1,PTBSE0=1 */ PTBSE = 0xFF; /* PTCSE: PTCSE7=1,PTCSE6=1,PTCSE5=1,PTCSE4=1,PTCSE3=1,PTCSE2=1,PTCSE1=1,PTCSE0=1 */ PTCSE = 0xFF; /* PTDSE: PTDSE7=1,PTDSE6=1,PTDSE5=1,PTDSE4=1,PTDSE3=1,PTDSE2=1,PTDSE1=1,PTDSE0=1 */ PTDSE = 0xFF; /* PTESE: PTESE7=1,PTESE6=1,PTESE5=1,PTESE4=1,PTESE3=1,PTESE2=1,PTESE0=1 */ //PTESE |= (unsigned char)0xFD; /* PTFSE: PTFSE7=1,PTFSE6=1,PTFSE5=1,PTFSE4=1,PTFSE3=1,PTFSE2=1,PTFSE1=1,PTFSE0=1 */ PTFSE = 0xFF; /* PTGSE: PTGSE5=1,PTGSE4=1,PTGSE3=1,PTGSE2=1,PTGSE1=1,PTGSE0=1 */ PTGSE |= (unsigned char)0x3F; /* PTADS: PTADS7=0,PTADS6=0,PTADS5=0,PTADS4=0,PTADS3=0,PTADS2=0,PTADS1=0,PTADS0=0 */ PTADS = 0x00; /* PTBDS: PTBDS7=0,PTBDS6=0,PTBDS5=0,PTBDS4=0,PTBDS3=0,PTBDS2=0,PTBDS1=0,PTBDS0=0 */ PTBDS = 0x00; /* PTCDS: PTCDS7=0,PTCDS6=0,PTCDS5=0,PTCDS4=0,PTCDS3=0,PTCDS2=0,PTCDS1=0,PTCDS0=0 */ PTCDS = 0x00; /* PTDDS: PTDDS7=0,PTDDS6=0,PTDDS5=0,PTDDS4=0,PTDDS3=0,PTDDS2=0,PTDDS1=0,PTDDS0=0 */ PTDDS = 0x00; /* PTEDS: PTEDS7=0,PTEDS6=0,PTEDS5=0,PTEDS4=0,PTEDS3=0,PTEDS2=0,PTEDS1=0,PTEDS0=0 */ //PTEDS = 0x00; /* PTFDS: PTFDS7=0,PTFDS6=0,PTFDS5=0,PTFDS4=0,PTFDS3=0,PTFDS2=0,PTFDS1=0,PTFDS0=0 */ PTFDS = 0x00; /* PTGDS: PTGDS5=0,PTGDS4=0,PTGDS3=0,PTGDS2=0,PTGDS1=0,PTGDS0=0 */ PTGDS = 0x00; // ---------------- MCU init -------------------------------------------
Maybe because of some clock setting, the MSCAN clock cannot synchronize with the bus clock?
thanks,
Johannes
// MCU/Board Specific configuration SOPT1 = 0; //Multi-purpose Clock Generator config register2 //set HGO (high gain operation),EREFS (oscillator),ERCLKEN (ext clk reference enable) MCGC2 |= 0x26; //wait for oscillator to initialize while(!MCGSC_OSCINIT); //Multi-purpose Clock Generator config register1 MCGC1 = 0x00; //wait until output of PLL is selected as clock mode if(MCGSC & 0x0C) { for(;;) ; // Empty Body */ }
The solution is, for s08 CAN module to initialise, the MCGERCLK bit in MCGC2 register should be set.