Processor Expert

[admin]

Hi,

I am trying to write and read the high page of HCSQE128 flash, I have attempted to use the Processor Expert to set those pages i.e. PPAGE4,PPAGE5,PPAGE6,PPAGE7 as BANKED pages or unitialized mode. However, when I go into Processor Initialization the LAP register remains as READ_ONLY register not enabled.

I have changed set the compiler and assembler into BANKED mode as oppose to the default setting i.e SMALL, I have also gone thru

AN3730 Understanding Memory Paging in 9S08 Devices

the application sheet does not mention the need to enable the LAP register.

Can anyone clarify what are the steps to read and write into high page flash?

Thanks!

[ProcessorExpert · Accepted solution]

Hello,
 
Processor Expert provides IntFlash hi-level component that provides easy methods for reading/writing (SetByte, GetByteFlash, SetWord, etc). Using these methods you could write/read whole memory area without dependence on currenlty selected memory model.
 
For example, to write into last byte of memory in Processor Epxert using IntFlash component, you can use:
err = IFsh1_SetByteFlash(0x0001FFFF,0x00);

For more details please see help of the IntFlash component (accessible from component pop-up menu).

best regards
Vojtech Filip
Processor Expert Support Team

[Learner_z31_zma]

Hi Vojtech,

Thank you for your reply, just to clarify my question. I am unable to access the LB register using CW6.3. Processor Expert indicates that LAP2 to LB register as undefined,reserved,read-only.

Please see the attached pic for clarification.

I did a search on IntFlash and it appears to be an upgrade feature!???

Embedded Component: IntFLASH

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=IntFLASH&fsrch=1

Do I need to purschase this just to program the extended part of Flash?

[ProcessorExpert]

Hello,

the Init_Flash components only initializes Flash device, so this component does not handle LAP, LB, etc, registers because their are run-time registers. Therefore you can use it however you must write all run-time routines by yourself. You can freefly use these registers in your code.  

Regarding to IntFLASH component - IntFlash component is Advanced component and it is necessary to have purchased Professional suite or to buy IntFlash component separately within component store (formerly: bean store).

If you are interested in using IntFlash component:

- you can find more detailed about IntFlash in component help, that is accessible through "Help" menu command from component pop-up menu. To view this component please switch off license filter button in bottom part of component library window (formerly: bean selector window) . You could also insert this component in your project, but it would be not generated code.

- you could also try  to obtain trial/evaluation license for professional suite

best regards
Vojtech Filip
Processor Expert Support Team

[Learner_z31_zma]

Quote:"

the Init_Flash components only initializes Flash device, so this component does not handle LAP, LB, etc, registers because their are run-time registers. "

Just out of curiosity, whats the purpose of including LAP and LB registers in the Processor Initialization ?

Quote:"Therefore you can use it however you must write all run-time routines by yourself. You can freefly use these registers in your code. "

This is the problem that I am having,  I can read and write to (LAP2:LAP0) register during run-time routine but not LB and LBP register. The value of LB and LBP register remains FF regardless read or write to the register.

Therefore I can not access PPAGE memories in QE128 devices, because I can not access LB and LBP register.

Any idea what  could cause this?  Would  love to see a sample assembly set up routine if there is one?

The application sheet

AN3730 Understanding Memory Paging in 9S08 Devices

doesn't seems to imply there is any set up required to use LB registers........ but is there a need to "enable/activate" the LB register?

[CompilerGuru]

What value do you write to LAP?

Also note that reading LB/LBP has side effects, therefore I'm not sure if those registers are displayed in the debugger.

Could be that those reads are suppressed in order to avoid the side effects, so do you have code reading from LB/LBP?

Daniel

[Learner_z31_zma]

Hi Daniel,

I am in the process of testing my own code based on AN3730 Understanding Memory Paging in 9S08 Devices,

Method 1:

p.4 ---> Section 2.1 The Program Page (PPAGE)

Quote:To read and write data, set the page value in the PPAGE register and then access the memory between
addresses 0x8000 and 0xBFFF. Every page is offset with the PPAGE value.

p.7 ---> Section 4 The Full Memory Map

Quote:The PPAGE default value is 2 at startup, which results in a contiguous memory block from page 1
to 3.

Therefore I simply read and write using LDA, STA or MOV instructions to read and write (LAP2:LAP0)

My code:

/*To write 0 in the 1st address at PPAGE2

ldhx     #$80

ldx         #0

clra

sta      ,x

//======================

Method 2:

p.5 ---> Section 2.2 Linear Address Pointer and Linear Address Space

Using addresses in Figure.9 on page 11

My code:

/*To write 0 in the 1st address at PPAGE2

mov     #0, LAP2

mov     #$80, LAP1

mov     #0, LAP0

mov     #0, LB

Both method does not work, looking forward to your advise.

[CompilerGuru]

For your method one, make sure the code is not inside of the PPAGE window (0x??8000..0x??BFFF) itself.

For both methods, I would expect those to work for reading. Writing to flash does need more work than a simple STA, check the forum for this topic how to do this.

Daniel

[Learner_z31_zma]

In MC9S08QE128 MCU Series Reference Manual, Rev. 2

p.69 --->quote: "CAUTION
A flash block address must be in the erased state before being programmed.
Cumulative programming of bits within a flash block address is not allowed
except for status field updates required in EEPROM emulation applications."

Does this mean it is not possible to write value in a specific address only? Which is what I am attempting to do.

Also, does

p.73 --->  4.6.2.4 Flash Protection Register (FPROT and NVPROT)
The FPROT register defines which flash sectors are protected against program or erase operations.

requires to be setup in prior to the use of LAP and LB?

[CompilerGuru]

I would recommend that you handle the issue of banking/LAP/PPAGE access separately from flash programming initially.

First try to write a (non banked) flash byte, and read a banked byte (what this thread is about).

Once you have mastered the unbanked flash programming and the banked flash reading, I hope the rest is simple.

To the flash programming topic, please see the other threads for this. This is also a CW board, you will find more info in the "8-Bit Microcontrollers" forum, I would also ask flash related questions there.

Flash has to be erased before being programmed and it only supports to erase block by block.

The Flash Protection only matters if you did set it up to protect your area.

Daniel

[Learner_z31_zma]

Hi Daniel,

Thanks for the suggestion, will proceed with some more testing and see how it works out.

I was hoping to get a verification on the fact that this indeed is not a compiler/assembler issue but a hardware issue, since I can not be certain that if it was due to error in setting of memory mode or Processor initialization which is the cause of this problem.

I have tried the 8-bit forum but there was no reply, will try a new post there and see.

Thanks!