 
					
				
		
 
					
				
		
;
; Add the ICR value to a constant offset and store in the OCR.
;
    lda    TPMC1V+1            ;  3 get the ICR value, low byte
    add    #LOW(time_base)     ;  2 add low byte of update rate
    tax                        ;  1 set aside for load
    lda    TPMC1V              ;  3 get the ICR value, high byte
    adc    #HIGH(time_base)    ;  2 add high byte of update rate
    sta    TPMC0V              ;  3 high byte must always be loaded first
    stx    TPMC0V+1            ;  3 low byte must always be loaded last
;                               = 17 cycles
Hello FC,
A slight variation of Rocco's method that does not use the HIGH and LOW directives (not necessarily available for all assemblers).
lda    TPMC1V+1            ;  3 get the ICR value, low byte
add    #(time_base%256)    ;  2 add low byte of update rate
tax                        ;  1 set aside for load
 lda TPMC1V ; 3 get the ICR value, high byte
adc    #(time_base/256)    ;  2 add high byte of update rate
sta    TPMC0V              ;  3 high byte must always be loaded first
stx    TPMC0V+1            ;  3 low byte must always be loaded last
Regards,
Mac
 
					
				
		
Thanks for the responses. I forgot to mention that its for the HCS08.
The assembler for CW 5.0 returns an error when the +1 is next to channel register. I have seen :smileyshocked: and :1 used before, what does the CW 5.0 assember use?
 
					
				
		
CompilerGuru wrote:
To access a low byte from a 16 bit variable from assembly, just add 1 to the address of the variable. The HC08 is big endian, and therefore the low byte is at the higher address.
Hmm . . . I could never get CW to work, so I'm still using MCUez. I wonder if this is why CW gives me thousands of errors? Sorry I can't be of more help there. Please let me know what you find out.
FC wrote:
The assembler for CW 5.0 returns an error when the +1 is next to channel register. I have seen :smileyshocked: and :1 used before, what does the CW 5.0 assember use?
;
; Add the ICR value to a constant offset and store in the OCR.
;
    lda    TPMC1V+1            ;  3 get the ICR value, low byte
    add    #LOW(time_base)     ;  2 add low byte of update rate
    sta    TPMC0V+1            ;  3 load low byte of OCR
    lda    TPMC1V              ;  3 get the ICR value, high byte
    adc    #HIGH(time_base)    ;  2 add carry and high byte of update rate
    sta    TPMC0V              ;  3 load high byte of OCR
;                               = 16 cycles
					
				
			
			
				
			
			
				
			
			
			
			
			
			
		Hello Rocco, FC,
I have not been able to replicate FC's problem using CW 5.0 assembler. The arithmetic on the register address seems to work fine. I even added spaces before and after the + sign, again without problem (I thought I might have to add parenthesis in this case). In fact, when I placed a colon in lieu of the + sign, I got an assembly error.
I assume that FC is actually using the assembler, rather than inline assembly within the C compiler. The attached sample file assembles correctly using CW 5.0.
Regards,
Mac
 
					
				
		
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			CompilerGuru
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		 
					
				
		
 
					
				
		
 
					
				
		
 
					
				
		
;
; Add the ICR value to a SMALL constant offset and store in the OCR.
;
      ldhx    TPMC1V            ;  4  Get the ICR value
      aix     #time_base        ;  2  Add a small offset to it
      sthx    TPMC0V            ;  4  And store in the OCR
;                                =10 cycles
					
				
			
			
				
			
			
				
			
			
			
			
			
			
		 
					
				
		
 CompilerGuru
		
			CompilerGuru
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		