when i change spi(MC9S12XEP100CAG) clock edge from faling to rising edge, the spi1 module's slave select pin PH3 does not generate chip select signal(from high level to low level). but it works well when clock edge is faling edge. i was using codewarrior processor expert to develope the mcu.
Hello,
Can you please specified what the falling/rising edge means in terms of POL, CPHA?
Please refer to Section 21.4.3.1 Clock Phase and Polarity Controls in the S12XE RM, rev1.25.
Anyway, the automatic slave select should work regardless of the configuration.
Could you please attach a test project?
Thank you,
BR, Daniel