The Reference Manual for the QE8 does not explain Bit 6,the FLS bit, in the System Clock gating Control 2 register (SCGC2). It covers all the other bits but not the FLS bit. If the FLS bit is set to 0, this will disable reading the FLASH high registers in $1820-$182B. Once enabled, FLASH can be erased and reprogrammed in-application.