Hello,
In one of our products we use the MC9S08SE4 microcontroller.
We have noticed that when we change the PWM period (TPM1MOD) in the timer overflow interrupt (Vtpm1ovf),
there are two PWM periods until next overflow interrupt.
Our code sample - in order to reproduce this issue - is:
unsigned int TPM1MOD_BUF;
void main(void)
{
TPM1MOD = 500;
TPM1CNTH = 0;
TPM1C0SC = 0x28;
TPM1C0V = 250;
TPM1SC = 0x4B;
EnableInterrupts;
for(;;)
{
__RESET_WATCHDOG();
}
}
interrupt VectorNumber_Vtpm1ovf void isr_Vtpm1ovf(void)
{
TPM1SC;
TPM1SC_TOF = 0;
TPM1MOD_BUF = TPM1MOD;
TPM1MOD_BUF += 100;
TPM1MOD = TPM1MOD_BUF;
TPM1MOD_BUF >>= 1;
TPM1C0V = TPM1MOD_BUF;
TPM1C1V = TPM1MOD_BUF;
}
Do you know why is this happening?
Thanks in advance.
Hi, That is normal behavior.
Please check the below mechanism of writing TPMxMOD, you can find it in the section 13.4.3 of the reference manual (page 197)
Writing to either byte (TPMxMODH or TPMxMODL) latches the value into a buffer and the registers are
updated with the value of their write buffer according to the value of CLKSB:CLKSA bits, so:
• If (CLKSB:CLKSA = 0:0), then the registers are updated when the second byte is written
• If (CLKSB:CLKSA not = 0:0), then the registers are updated after both bytes were written, and the
TPM counter changes from (TPMxMODH:TPMxMODL - 1) to (TPMxMODH:TPMxMODL). If
the TPM counter is a free-running counter, the update is made when the TPM counter changes from
0xFFFE to 0xFFFF
If you turn off the TPM in the interrupt, then write TPMxMOD, the value will be updated immediately.
B.R
XWP
Dear Xu,
By using the exact same code to the MC9S08PA4 microcontroller, there is only one PWM period until next overflow interrupt.
According to the MC9S08PA4 datasheet - section 12.4.8.1 - the mechanism of writing TPMxMOD is the same. The only difference is that
the update is made when the TPM counter changes from 0xFFFF to 0x0000.
So, why there is different behavior on the two families?
Thanks,
Konstantinos.
Hi Konstantinos,
The modules in S08SE and S08PA are different, but now I suppose I misunderstood the issue you met in S08SE. I just do some test in S08P family,
below is the code.
void FTM0_Init(void)
{
FTM0_SC = 0;
FTM0_C0SC = 0;
FTM0_C1SC = 0;
FTM0_MOD = 0xFFFF;
PORT_PTDIE_PTDIE6 = 0;
PORT_PTDOE_PTDOE6 = 1;
PORT_PTDD_PTDD6 = 0;
FTM0_SC = 0x4C; // start
}
// Interrupt Service Routine
ISR(IsrFTM0OVF)
{
// NOTE: The routine should include actions to clear the appropriate
// interrupt flags.
//
static byte overflow_count = 0;
byte dummy;
dummy = FTM0_SC;
FTM0_SC_TOF = 0;
FTM0_MOD = 0x5000;
overflow_count++;
if(overflow_count == 6)
{
}
if(overflow_count == 12)
{
FTM0_SC_CLKS = 0;
}
PORT_PTDIE_PTDIE6 = 0;
PORT_PTDOE_PTDOE6 = 1;
PORT_PTDD_PTDD6 ^= 1;
}
In the ISR, I toggled one GPIO to be monitored by an Osilloscope. I got below waveform:
We can see the first period is still 0xFFFF, and FTMxMOD is updated at the first falling edge(the second overflow interrupt).
Is that what you observed in S08PA? Could you share the waveform got from S08SE?
Dear Xu,
Please run the following example to a MC9S08SE4 controller. You should see the results as per attached images.
void main(void)
{
PTAD = 0x00;
PTADD = 0xFF;
ICSTRM = 0xb9;
ICSC2 = 0x00;
TPM1CNTH = 0;
TPM1MOD = 500;
TPM1C0SC = 0x28;
TPM1C0V = 250;
TPM1SC = 0x4B;
EnableInterrupts;
for(;;)
{
__RESET_WATCHDOG();
}
}
interrupt VectorNumber_Vtpm1ovf void isr_Vtpm1ovf(void)
{
static unsigned int TPM1MOD_BUF;
static unsigned char i;
TPM1SC;
TPM1SC_TOF = 0;
TPM1MOD_BUF = TPM1MOD;
TPM1MOD_BUF += 100;
TPM1MOD = TPM1MOD_BUF;
TPM1MOD_BUF >>= 1;
TPM1C0V = TPM1MOD_BUF;
if (++i == 4)
TPM1SC = 0;
}
As you can see, between overflow interrupts, there are two periods. Notice, that in overflow interrupt the PWM
period is changing by altering the TPM1MOD register. The initial period is 500 usec and in each overflow interrupt
is increasing by 100 usec. So, the expected values would be: 500 -> 600 -> 700 -> 800 usec. Instead we see that
the output periods are: 500 -> 600 -> 600 -> 700 -> 700 -> 800 etc.
I hope everything is clear now.
Do you think that this is an abnormal behavior?
Thanks,
Konstantinos.