Startup timing when resetting an MC9S08AC60

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Startup timing when resetting an MC9S08AC60

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dgipling
Contributor I

Hi, I have inherited an application where they force an illegal opcode to do a restart. Will there be any differences in the "startup time" when an illegal opcode occurs compared to a reset caused by an LVD, COP or ICG?

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david_diaz
NXP Employee
NXP Employee

Each of the reset sources forces the internal and/or external Reset signal low for the same number of internal clock cycles. COP, illegal opcode, illegal address, and clock reset sources will show an identical Reset pulse width. POR, PIN, and LVD reset sources will depend on external conditions (supply ramp, switch duration, low voltage condition), but the internal reset signal is still driven low for the same amount of time once the condition is cleared.

The number of internal clocks and the clock source depends on the individual MCU. There is usually some text in the Reset pin description or in the MCU Reset section of the datasheet or Reference Manual that gives this info.

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