Problems regarding Xtal function on MC908AP

[reykjavik]

I have been programming MC908APCFAE microcontroller, using the CodeWarrior dev. tools and FSICEBASE platform.

The hardware is functioning correctly when connected to the development tool through the MON08 cable and the development tool is generating the clock signal. 

As soon as I try to run the target by it´s own Xtal the oscillating circuit does not oscillate. 

Note should be taken that when the external clock signal  from the development tool is applied to the OSC1 pin, no inverted signal is detected at the OSC2 output.

Hope someone can help

Regards

[reykjavik]

Maybe I am a little bit impatient, but just to clarify the problem regarding the oscillator not functioning:

I am not that concerned that the problem is related to external components of the oscillator circuit on the target board. I have followed precisely all guidelines set forth in the MC68HC908AP64 data sheet regarding component selection, and also guidelines regarding PCB layout.

I am in fact more concerned regarding the proper register settings, e.g., the CONFIG2 register and the MOR register.  There is one thing that could help us tracking the problem and that is the question regarding the inverting output OSC2.  When applying external clock input to the OSC1 pin, shouldn't we have a output clock on the OSC2 pin?

Regards

[bigmac]

Hello, and welcome to the forum.

With reference to Fig. 5.1 of the datasheet, the crystal option requires that the appropriate settings be programmed to the OSCSEL bits of the MOR register, to select the correct oscillator configuration.  Secondly, if the feedback resistor connected between the two oscillator pins should have been omitted, the crystal oscillator will not work.

Also note that the CONFIG2 register is write once after reset.

Regards,

Mac

[reykjavik]

Thanks for attending my problem Mac

My code is an assembly one.  Immediately after POR the code looks like this:

After POR:

      RSP                           ; Reset Stack Pointer

      CLRA                         ; Initialize A,X so that interrupt

      CLRX                         ; uninitialized register warnings

*** -------------------------------------------------------------------

      BSET        0,CONFIG1           ; Disable COPCTRL (Wdog)

*** -------------------------------------------------------------------

      BSET        4,CONFIG2           ; External oscillator

When I read the registers CONFIG1 and CONFIG2 I get the proper settings:

CONFIG1 = %00000001     ; COPCTRL (Wdog) disabled

CONFIG2 = %00010000     ; X-tal oscillator (XCLK)

I do not change any settings regarding the MOR register.  I presumed that after POR all bits would be set to “1” as described in the datasheet.  Also, when reading the MOR register I get:

CONFIG1 = %11111111     ; OSCSEL1 and OSCSEL0 = 11 = XCLK

It could be helpful to know how to change the settings of the MOR register in the FLASH area of the ROM

But again, many thanks for helping out and hopefully you can guide in resolving this problem.

Regards, Oskar

[bigmac]

Hello Oskar,

You are correct in that the default (unprogrammed) setting of MOR should provide for the crystal oscillator configuration.  When you drive an external square wave signal to the OSC1 pin, I cannot explain why you would not observe an output signal at the OSC2 pin, assuming there is not a short circuit within the external circuitry.  Maybe you should check that the capacitor at each OSC pin is in the "tens of picofarad" range, and not a considerably higher value.

Should you ever wish to change the MOR setting, to provide for alternative oscillator configurations, you would need to program the new value at the same time as you program the rest of the firmware into flash memory.

;

   ORG   $FFCF   ; Address of MOR

   DC.B  $FF     ; Default value

;

I notice that the OSCCLK bits within CONFIG2 register play no part in determining the oscillator configuration, but are used to select the clock source applied to the timebase module.  However, since the CONFIG1 and CONFIG2 registers are write once, the usual practice is to write all bits simultaneously, rather than use a BSET instruction (multiple BSET instructions will not work in this case).

;

   MOV   #%00000001,CONFIG1

   MOV   #%00010000,CONFIG2

;

While not connected with your current problem, I notice that you are using page 0 RAM for the stack.  It is generally more efficient to use upper RAM for the stack, and utilise page 0 for your program variables.  The following code should set the stack pointer to the top of RAM.

;

_Startup:

   LDHX  #RAMEnd+1

   TXS

;

I am not sure why you needed to include the CLRA and CLRX instructions.

Regards,

Mac

[reykjavik]

Many thanks for the lead Mac.

Now I have changed the MOR and CONFIG2 to use the internal clock and can observe 22.500 kHz square wave on OSC2 output.  So now I know that the OSC2 pin is working.  I will change the registers back to X-tal function when I get further solving my problems, with your aid.

The next question is what frequencies are allowed when connecting X-tal between pin OSC1 and OSC2?  In the text they refer to 32.768 kHz as the preferred frequency but in Figure 8-1. Monitor Mode, they show 4.9152MHz X-tal with 1M parallel resistor and 6 – 30 pF capacitors to ground.

I am trying to use 9.8304MHz X-Tal with 10M parallel resistor, 100K feedback resistor and 22pF capacitors to ground.

Can you advice?

Regards, Oskar

ps. you warn me if I am to aggressive seeking your help

[bigmac]

Hello Oskar,

You do not specifically say whether you are using the MC908APxx or the MC908APxxA version.  I note that the oscillator and CGM modules are different.  From the datasheet, the non-A version requires an external reference crystal for the CGM module between the limits 30 - 100kHz.  The A-version is completely different, with an external reference crystal frequency between the limits 1 to 8 MHz.  I assume that these limits are to do with the reference divider for the PLL.

Both devices seem to support a direct clock input to OSC1 pin, from an external oscillator, of up to 32MHz (with PLL not used).  However, whether higher frequency crystals can be used is unspecified.

A crystal at 9.8304 MHz is too high for PLL use, even if using the A-version.  If you were able to get the crystal working in direct mode, this would result in a maximum bus frequency of 2.4576 MHz only.

If you have a 100k resistor in series with the high frequency crystal, this would be a major factor for the non-oscillation condition.  The resistor is required to limit dissipation in a low frequency clock crystal, but should be shorted for higher frequencies.  The value of the shunt resistor between the two oscillator pins is non-critical; 1 - 10 Mohm should work.  The value of the two capacitors will depend on the frequency calibration of the crystal during manufacture.  Within limits, an incorrect value would result in a frequency error, but would not prevent oscillation.

Regards,

Mac

[reykjavik · Accepted solution]

Hello Mac,

I am using the MC908AP16, not the the A version.

I will change to 32.768 kHz and apply PLL to achieve the desired frequencies for the internal busses.

Regards,  Oskar