Hello,
All types of reset use the same reset vector, i.e. the same as for a POR.
To fully define the COP operating conditions, SOPT2 register also needs to be written, in addition to SOPT1. This is to define the COP timer clock source, and whether there is "windowed" operation of the COP.
Additionally, have you taken into account that both registers are write once - each register must have all bits simultaneously written.
How are you monitoring when each reset occurs? Do you read the SRS register within the initialisation sequence, to determine which source was the cause of reset?
What do you specifically mean when you say that the MCU "hangs"? What you seem to be saying is that there is no reset occurring, but the code may otherwise be operating normally.
Do you have the __RESET_WATCHDOG() macro at more than one position within your code? Note that this macro should not be used within any ISR function.
Regards,
Mac
