HC908GZ16 - Interrupt Jump Table

[Thomas1416]

Hi experts,

I'm currently writing a bootloader for GZ16. Since the interrupt jump table is later protected via FLBPR I have to create a virtual jump table outside the protected area in order to use interrupts in my future application.

I already manipulated the protected jump table to point to another jump table outside the protected memory.

Does anyone know how to write the virtual jump table in C? I could write a function with lots of JMPs to the ISRs, however Codewarrior optimizes the JMP to BRA which is not correct.

Are there any other ideas?

Thanks in advance,

Thomqs

--
Alban Edit: FSL Part Number must figure in Message Subject line.

Message Edited by Alban on 2007-08-03 01:31 PM

[Alban]

Hello,

Here is a jump table that I placed in RAM:

Code:

#define VECTOR_TABLE_RAM_BASE 0x1F40
#define JMP 0x06    /* s12 OpCode for a jump */

     const tVECTORS ROMCodeVector = {    JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,    JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,    JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,    JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,    JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,    JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,    JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,    JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,    JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,    JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,    JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,    JMP,&_dummyISR,JMP,&_TIMER0_ISR,JMP,&RTI_ISR,JMP,&_dummyISR,JMP,&XIRQ_ISR,    JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_dummyISR,JMP,&_Startup};


                       /* Set-up Vector Table from Flash to RAM */
    rubbish = memcpy((unsigned char*)VECTOR_TABLE_RAM_BASE,
                      &ROMCodeVector, 192);

 It worked like a charm.

I used a tVECTOR:

Code:

typedef      /* Interrupt Vector RAM table - individual bytes are                 address of the start of functions to execute */ struct {        tU08 jmp63;                /* space for a jump instruction */        void *res63;               /* 63 0xFF80 --reserved--  */        tU08 jmp62;                /* space for a jump instruction */        void *res62;               /* 62 0xFF82 --reserved--  */        tU08 jmp61;                /* space for a jump instruction */        void *res61;               /* 61 0xFF84 --reserved--  */        tU08 jmp60;                /* space for a jump instruction */        void *res60;               /* 60 0xFF86 --reserved--  */        tU08 jmp59;                /* space for a jump instruction */        void *res59;               /* 59 0xFF88 --reserved--  */        tU08 jmp58;                /* space for a jump instruction */        void *vRegLow;             /* 58 0xFF8A VREG Low Voltage  */        tU08 jmp57;                /* space for a jump instruction */        void *pwmShtDwn;           /* 57 0xFF8C PWM Shutdown  */        tU08 jmp56;                /* space for a jump instruction */        void *ptp;                 /* 56 0xFF8E Port P Interrupt */        tU08 jmp55;                /* space for a jump instruction */        void *can4Tx;              /* 55 0xFF90 MSCAN 4 transmit  */        tU08 jmp54;                /* space for a jump instruction */        void *can4Rx;              /* 54 0xFF92 MSCAN 4 receive  */        tU08 jmp53;                /* space for a jump instruction */        void *can4Err;             /* 53 0xFF94 MSCAN 4 errors  */        tU08 jmp52;                /* space for a jump instruction */        void *can4WakeUp;          /* 52 0xFF96 MSCAN 4 wake-up  */        tU08 jmp51;                /* space for a jump instruction */        void *res51;               /* 51 0xFF98 --reserved--  */        tU08 jmp50;                /* space for a jump instruction */        void *res50;               /* 50 0xFF9A --reserved--  */        tU08 jmp49;                /* space for a jump instruction */        void *res49;               /* 49 0xFF9C --reserved--  */        tU08 jmp48;                /* space for a jump instruction */        void *res48;               /* 48 0xFF9E --reserved--  */        tU08 jmp47;                /* space for a jump instruction */        void *bfGene;              /* 47 0xFFA0 --reserved--  */        tU08 jmp46;                /* space for a jump instruction */        void *bfSynchro;           /* 46 0xFFA2 --reserved--  */        tU08 jmp45;                /* space for a jump instruction */        void *bfRx;                /* 45 0xFFA4 --reserved--  */        tU08 jmp44;                /* space for a jump instruction */        void *bfRxFifo;            /* 44 0xFFA6 --reserved--  */        tU08 jmp43;                /* space for a jump instruction */        void *can1Tx;              /* 43 0xFFA8 MSCAN 1 transmit  */        tU08 jmp42;                /* space for a jump instruction */        void *can1Rx;              /* 42 0xFFAA MSCAN 1 receive  */        tU08 jmp41;                /* space for a jump instruction */        void *can1Err;             /* 41 0xFFAC MSCAN 1 errors  */        tU08 jmp40;                /* space for a jump instruction */        void *can1WakeUp;          /* 40 0xFFAE MSCAN 1 wake-up  */        tU08 jmp39;                /* space for a jump instruction */        void *can0Tx;              /* 39 0xFFB0 MSCAN 0 transmit  */        tU08 jmp38;                /* space for a jump instruction */        void *can0Rx;              /* 38 0xFFB2 MSCAN 0 receive  */        tU08 jmp37;                /* space for a jump instruction */        void *can0Err;             /* 37 0xFFB4 MSCAN 0 errors  */        tU08 jmp36;                /* space for a jump instruction */        void *can0WakeUp;          /* 36 0xFFB6 MSCAN 0 wake-up  */        tU08 jmp35;                /* space for a jump instruction */        void *res35;               /* 35 0xFFB8 --reserved--  */        tU08 jmp34;                /* space for a jump instruction */        void *res34;               /* 34 0xFFBA --reserved--  */        tU08 jmp33;                /* space for a jump instruction */        void *res33;               /* 33 0xFFBC --reserved--  */        tU08 jmp32;                /* space for a jump instruction */        void *spi1;                /* 32 0xFFBE SPI1  */        tU08 jmp31;                /* space for a jump instruction */        void *iic;                 /* 31 0xFFC0 IIC Bus  */        tU08 jmp30;                /* space for a jump instruction */        void *res30;               /* 30 0xFFC2 --reserved--  */        tU08 jmp29;                /* space for a jump instruction */        void *crgScme;             /* 29 0xFFC4 CRG Self Clock Mode Enabled  */        tU08 jmp28;                /* space for a jump instruction */        void *crgPllLock;          /* 28 0xFFC6 CRG PLL lock  */        tU08 jmp27;                /* space for a jump instruction */        void *pulseBOvf;           /* 27 0xFFC8 Pulse Accumulator B Overflow  */        tU08 jmp26;                /* space for a jump instruction */        void *modDownUnderflow;    /* 26 0xFFCA Modulus Down Counter underflow  */        tU08 jmp25;                /* space for a jump instruction */        void *pth;                 /* 25 0xFFCC Port H  */        tU08 jmp24;                /* space for a jump instruction */        void *ptj;                 /* 24 0xFFCE port J  */        tU08 jmp23;                /* space for a jump instruction */        void *atd1;                /* 23 0xFFD0 ATD1  */        tU08 jmp22;                /* space for a jump instruction */        void *atd0;                /* 22 0xFFD2 ATD0  */        tU08 jmp21;                /* space for a jump instruction */        void *sci1;                /* 21 0xFFD4 SCI1  */        tU08 jmp20;                /* space for a jump instruction */        void *sci0;                /* 20 0xFFD6 SCI0  */        tU08 jmp19;                /* space for a jump instruction */        void *spi0;                /* 19 0xFFD8 SPI0  */        tU08 jmp18;                /* space for a jump instruction */        void *pulseEdge;           /* 18 0xFFDA Pulse accumulator input edge  */        tU08 jmp17;                /* space for a jump instruction */        void *pulseAOvf;           /* 17 0xFFDC Pulse accumulator A overflow  */        tU08 jmp16;                /* space for a jump instruction */        void *tovf;                /* 16 0xFFDE Timer overflow  */        tU08 jmp15;                /* space for a jump instruction */        void *tch7;                /* 15 0xFFE0 Timer channel 7  */        tU08 jmp14;                /* space for a jump instruction */        void *tch6;                /* 14 0xFFE2 Timer channel 6  */        tU08 jmp13;                /* space for a jump instruction */        void *tch5;                /* 13 0xFFE4 Timer channel 5  */        tU08 jmp12;                /* space for a jump instruction */        void *tch4;                /* 12 0xFFE6 Timer channel 4  */        tU08 jmp11;                /* space for a jump instruction */        void *tch3;                /* 11 0xFFE8 Timer channel 3  */        tU08 jmp10;                /* space for a jump instruction */        void *tch2;                /* 10 0xFFEA Timer channel 2  */        tU08 jmp09;                /* space for a jump instruction */        void *tch1;                /* 09 0xFFEC Timer channel 1  */        tU08 jmp08;                /* space for a jump instruction */        void *tch0;                /* 08 0xFFEE Timer channel 0  */        tU08 jmp07;                /* space for a jump instruction */        void *rti;                 /* 07 0xFFF0 real Time Interrupt  */        tU08 jmp06;                /* space for a jump instruction */        void *irq;                 /* 06 0xFFF2 IRQ  */        tU08 jmp05;                /* space for a jump instruction */        void *xirq;                /* 05 0xFFF4 XIRQ / BF Hifg prio Sync pulse */        tU08 jmp04;                /* space for a jump instruction */        void *swi;                 /* 04 0xFFF6 SWI  */        tU08 jmp03;                /* space for a jump instruction */        void *trap;                /* 03 0xFFF8 Unimplemented instruction trap  */        tU08 jmp02;                /* space for a jump instruction */        void *cop;                 /* 02 0xFFFA COP failure reset  */        tU08 jmp01;                /* space for a jump instruction */        void *clock;               /* 01 0xFFFC Clock monitor fail reset  */        tU08 jmp00;                /* space for a jump instruction */  void *reset;               /* 00 0xFFFE Reset   */           }tVECTORS;

But that is not necessary.
In the PRM, I added:

Code:

(...)  RG128_RAMVECTOR = READ_WRITE 0x1F00 TO 0x1FFF;(...) RG128_VECTORS           INTO RG128_RAMVECTOR;(...)

 
Alban.

[CrasyCat]

Hello

Basically if the ISR routines are implemented close to the virtual JUMP table the compiler will try to optimize the code here.

This optimization can be blocked using option -OnB=b.

I would implement the function as follows:

Code:

#pragma NO_ENTRY#pragma NO_EXIT#pragma OPTION ADD NoBRAOpt "-OnB=b"void JumpTable(void) {  asm {    JMP func1;    JMP func2;    JMP func3;  }}#pragma OPTION DEL NoBRAOpt 

pragma OPTION disables the optimization just for that function.

pragmas NO_ENTRY and NO_EXIT ensure the compiler is not adding superfluous entry or exit code to the function.

Note that you can alternatively define a constant table containing pseudo code for your Jump instruction.

For Example:

Code:

typedef struct {  unsigned char opCode;  void(*func)(void);} JumpTableType;const  JumpTableType JumpTableVar[]@0xFD00 = { {0xCC, func1},{0xCC, func2},{0xCC, func3},}  ;

 
0xCC is the opcode for JMP instruction. And the table is allocated directly at address 0xFD00.

Do not forget to specify the function name or table name in the PRM file ENTRIES block to make sure the jump table is linked to the application. 

I hope this helps.

CrasyCat

[Thomas1416]

The solution with the constant table I like best and it seems to work well.

Thank you very much again!

Regards,

Thomas